Hi We are having an issue with left channel on DA7212 codec connected to iMx8 in I2S mode. (Master clock is 12.288 Mhz and PLL in bypass)Sample rate is 32 kHz, and issue is observed running DA7212 DAI in either master or slave mode.
In about 1:100 recording sessions we observe sign bit error on left channel samples. It seems to be related with signal zero crossings.When it occurs the issue it persistent until the next recording session. ( Reconfigure of audio path).
We narrowed it down by configuring the DAI interface to use the same source for both I2S channels. The screendumps below illustrates the behaviour. Since we route the same signal to both I2S channel, pairs of identical sample values are expected on left and right channel.This is the case for most samples but at zero crossing the sign bit for the left channel is wrong.The signal capture below shows the situation where signal is changing from 0x0001 to 0xFFFF (Left channel MSB is 0 instead of 1 resulting in 0x7FFF) and the next sample (0x0002) but left channel MSB is inverted resulting in 0x8002.The dump below shows a recording of nearly silence, where signal crossings generates sign bit error in left channel
Hi Andres,Are you able to produce a register dump for the DA7212 settings in a .txt file?If yes, could you please provide it to us?Best Regards,OV_Renesas
Hi
Please find attached txt file containing register dump during active recording session.
MCLK from iMX8 is 12288000 Hz, and IMX8 is master on PCM interface in this scenario
i2cdump -f -y 1 0x1a No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 00 00 00 0c 00 00 07 07 0f 0f 7f 7f 00 00 00 00 ...?..??????.... 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 20: 00 10 09 08 00 00 20 04 01 80 32 00 00 00 00 00 .???.. ???2..... 30: 35 35 02 02 0f 0f 7f 7f 88 07 07 00 00 00 00 00 55?????????..... 40: 00 88 88 08 80 6f 6f 61 39 39 30 00 00 00 00 00 .????ooa990..... 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 60: 64 64 98 88 88 a8 a8 a0 a0 60 60 68 68 68 18 18 dd???????``hhh?? 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 80: 00 21 89 03 00 00 00 00 00 00 00 00 00 00 00 00 .!??............ 90: 00 00 00 02 00 32 95 00 00 00 00 00 3f 10 06 aa ...?.2?.....???? a0: 71 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 q............... b0: 00 00 00 00 00 00 00 55 15 00 40 02 01 00 00 00 .......U?.@??... c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 .............?..
Anders
Hi Andres,Thank you for the reply and for providing the register dump.I will get back to you as soon as possible.Best Regards,OV_Renesas
Hi Andres,Just for confirmation the audio path is Mic to DAI?Best Regards,OV_Renesas
Correct
Hi Andres,We checked the registers and no specific issues with your setup. We did not observe any difference between channels.However, you are using to much gain 66dB in total in that path. We had to reduce the MIC input Gain and Input Signal to stop the signals clipping.Do you have different MICBIAS voltages 2.2V and 1.6V? Would it be possible to share a schematic?We think that you are possibly clipping the "Left Channel" in your design.If you do not want to share this on the Public Forum, please create a private ticket:Technical Support Services | Support Forums & Ticket Assistance - Renesas | RenesasBest Regards,OV_Renesas
I already opened a private ticket last week. I have posted schematic section to ticket 387444.Br Anders