Cascaded CNTs clock on falling edge

Using GoConfigure SW 6.45.001 with MacOS Monterey 12.7.6, with an SLG46620V.

When I cascade CNTs such that CNT(n) is clocked by CNT(n-1)'s output, CNT(n)'s output changes on the falling edge of its clock.

It used to change on the rising edge of its clock, with older GoConfigure SW, and designs were based on this!

The attached GP file shows every CNT changing its output on the falling edge of its clock (except CNT0, which is clocked directly 

from the RC Osc).

Is there a magic option for specifying the active clock edge? (that would be nice!)

Cascaded CNTs - clocked by falling edge.gp4.zip

Parents Reply
  • Hi AB, the problem comes when you add an element (inverter, for example) to the output of one of the counters and then probe this inverter's output signal compared to the counter's input, the time displayed is still only the prop delay time for that inverter without regard to how many cascaded counters are used.

    So after passing through 10 cascaded counters, the output appears to change several nsec after the input (not realistic). That implies that all of in in-between connections you make to these counters via the matrix will not be accurate and subsequent displays cannot really be relied on. Best to avoid having to use connections like that.

    Could errors in the characterization data cause this effect?

    Has it been seen or reported on Win10 or Win11 systems so far?

    Thanks,

    ...Craig

Children
  • Hi AB, I just tried 6.48.001 GoConfigure SW with the designs that produced the errors noted above, and...it looks like the simulation is producing valid-looking results. I'll poke it a bit more, but would you check with the developers to see if they have intentionally fixed this please? I'd hate to think the problem might come up again unexpectedly.

    Thanks,

    ...Craig