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Confirm Memory Detail of 70261L15PFG

Shih01

Hi,

As I will be taping out a chip recently, I want to confirm some details with your team regarding the SRAM Verilog behavioral model file you provided.

verilog_model.zip

The product I purchased is 70261L15PFG (https://www.mouser.tw/ProductDetail/), and you previously informed me that the Verilog model for 7025 is compatible with this product. However, there are many related parameters to configure in the config.idt7025 file. Therefore, I would like to ask for your assistance in confirming that the settings in my current file (above) are compatible with the 70261L15PFG.

Another part is about when there are some unknowns in the input signal (as shown in the figure), will it cause any port to be forcibly locked? I know that if I open both ports simultaneously and they have the same address, SRAM will forcibly lock one of the ports, and it seems that it won't reopen after changing addresses unless control signals are changed to return to normal operation. I'm not sure if this is a problem with the behavior model or if the actual SRAM operates like this.
Therefore, I want to ask about situations like those in the figure where some control signals may be unknown for a short time, or both ports' addresses become unknown at the same time, whether this would cause a port to be locked during actual operation. (Currently, under this situation from simulation, SRAM operates without problems.)

Thank you very much for your response!

Best,
Jason Shih

  • 0

    Hi there,

    Regarding your request for confirming details about the SRAM Verilog behavioral model file and its compatibility with the 70261L15PFG, it's crucial to ensure that the parameters set in the config.idt7025 file are appropriate for your specific product. Since you have a specific zip file and configuration to review, I recommend reaching out directly to the support team at the supplier or manufacturer for precise assistance.

    As for the behavior when there are unknowns in the input signal, your description aligns with typical SRAM operation, where simultaneous access to the same address can indeed cause one port to lock. In actual SRAM, brief unknown states in control signals might not necessarily cause issues, but it’s essential to consult the specific SRAM's datasheet or technical support to confirm its behavior under such conditions 

    Best regards,
    Diana P.
    NextCareurgentcare

  • 0 in reply to diana45peters

    Hi ,

    You mentioned that I could contact the supplier or manufacturer's support team. However, since the manufacturer of this SRAM is Renesas, should I confirm this through another channel? In the past, I have always contacted Renesas' support team through here.

    Additionally, regarding the issue I mentioned in the latter part of above message, I have resolved most of the unknowns, leaving only the unknown in the waveform related to addra. So, I’d like to ask: when both the a and b ports are enabled, and addra is unknown while abbrb is 8262 (or any other address), could this cause a lock issue? (I plan to test this using an FPGA, but I was wondering if there are any past experiences or known outcomes related to this scenario.)

    Best regards,
    Jason Shih

  • 0

    Hi Jason,

    Thank you for reaching out with your questions regarding the SRAM Verilog behavioral model file and the 70261L15PFG product.

    Verilog Model Compatibility: It's great that you've confirmed the Verilog model for 7025 is compatible with your product. To ensure the settings in your config.idt7025 file are correct, I recommend reaching out directly to the support team at Renesas or the supplier. They can provide precise assistance and verify the compatibility of your current settings.

    Port Locking Behavior: Regarding the issue with unknown input signals causing port locking, it's important to note that simultaneous access to the same address by both ports can indeed cause one port to lock. This behavior is typical for dual-port SRAMs. In actual operation, brief unknown states in control signals might not necessarily cause issues, but it's best to consult the specific SRAM's datasheet or technical support to confirm its behavior under such conditions.

    I hope this helps! 

    Best regards,
    Teresa
    HomeDepot Survey

  • +1

    Dear Jason,

    Thank you for posting your question and apologies for the delay.
    Please refer on Technical Support Services | Support Forums & Ticket Assistance - Renesas | Renesas

    Please raise a private ticket and we can handle your inquiry there.

    Best Regards,
    OV_Renesas

  • 0 in reply to OV_Renesas

    Hi ,

    Thanks for your help, I have already raised a private ticket.

    Best Regards,
    Jason Shih