assembly instruction for breakpointing during stack overflow


I need to implement a stack overflow handler which will disable all interrupts and then execute some instruction such as bkpt  #0 in case of ARM Cortex and then enter infinite loop 

void StackOverflow( ) {

// disable all interrupts
//todo: Indicate Overflow by write to GPIO port or an LED

__asm volatile("bkpt #0"); // breakpoint here

for(;;) { }


Is there similar instruction in RH850 to do this similar to bkpt #0 in case of ARM Cortex?


  • There are different RH850 CPU cores and you don't mention which RH850 series you are using.  You find the RH850 instruction set in the SW manual of each core type, here is as an example the SW manual of the RH850G3KH core:

    Please check if the HALT instruction fulfills your requirements.

  • Thanks for replying, the micro variant is RH850F1K

    Is calling the instruction  __BKPT(0); in above piece of code  fair enough for this purpose?

  • The equivalent RH850 assembly instruction that you are looking for is the DBTRAP insn, but I'm not sure that is the appropriate action to take based on a stack overflow detection. 

        asm( "dbtrap" );  // GHS in-line assembly

    As this insn is used to implement software breakpoints, using this to throw a run-time exception would seem ill-advised.

    It might be better to use something like SYSCALL, TRAP, or FETRAP to handle this condition.

  • ok noted, thanks  very much for point it out . I will try out the TRAP or SYSCALL or perhaps HALT and see how it works

  • ok noted, thanks very much for pointing it out .

  • Hello pras,

    JimB is right regarding generation of breakpoints using the "dbtrap" instruction. However, it does only forces the CPU to enter the debug mode ("breakpoint"), where an external Debugger may communicated with the debug system via the debug interface. This is most probably not what you intend.

    Most RH850 (like RH850/F1K) offer a Memory-Protection-Function (MPU), which is intended to force an exception in case of memory protection violations. This is the most common way to handle stack overflows. The MPU is described in the manuals mentioned by Fragero.

    The debug system itself also offer to set breakpoints on memory access (/violations). However, in most RH850 (like F1K), the debug system is not accessible by the CPU core. Only an external Debugger connected via LPD-1/LPD-4/Nexus is able to access the debug system for such purposes.

    Best regards

  • ok in that case when stack overflow occurs in an application thread , will we still be able to access the data flash (r/w) or suspend the data flash

    , what is the suggested behaviour ?

  • Hello pras,

    if any exception is called, the CPU enter the exception mode and no other (maskable) interrupt can be called. Depending on the exception level also other exceptions might be prevented, before the exception returns to normal operation mode. Leaving the exception can only be done by a EIRET/FERET instruction, which places the Compiler at the end of an exception routine. This just explain the CPU modes, which you should take in mind when trying to execude code from the exception routine. Some software drivers might needed interrupt processing in the background and may not work as expected.

    The flash handling (regardless of code/data flash) is handled by an internal Flash Access Controller Interface (FACI), which do not care for the CPU mode. You could control the flash as usual. Please take in mind that you may have currently a data flash operation. So, it depends on the current status, which kind of access is possible.

    Attention: If you have a stack overflow, you have to think about the consequences. Calling data flash libraries could work , but without having a valid stack, this should be handled with care (e.g. restoring stack to valid area).

    The flash librarues are usual not designed for re-entrance!

    Best regards