RL78 F13 - Needed sample code to understand DTC functionality with ADC Scan One shot mode

Dear Renesas community,

I'm looking for sample code to understand DTC with ADC scan one shot mode.

Needed scenario like 4 ADC channels conversion data want to transfer from ADCR to 4 different variables at each INTAD interrupt.

and 4 variables like arr[index], index value will be incremented at each INTAD interrupt. and index will be reseted after 4th channel ADC conversion

Could you please provide the sample code for the same?

Thanks & Regards,


  • Hello,

    Yes, I can provide this for you. 

    So when the INTAD occurs, you want to store the 4 results of the 4 ADC channels in a buffer using DTC, correct ?

  • Yes, every trigger of ADC SOC will generates 4 INTAD interrupts one by one after EOC(end of ADC conversation). 


    1. So when 1st interrupt comes, transfer the result from ADC result register(source address is fixed for DTC) to arr[0] register. 

    2. Then when 2nd INTAD interrupt comes after 2nd channel ADC EOC, same ADC result register data should be copied to arr[1].

    3. Likewise for 3rd and 4th interrupt, DTC should transfer the ADC result register data into arr[2] and arr[3]. 

    4. Then array counter will reset and next trigger of ADC SOC, will start again and repeat steps from point no 1.

    Note :  I have considered 16 bit data transfer for 10bit ADC. 

    Kindly consider above scenario for sample code. 

    In addition, I have few queries as mentioned below - 

    1. for DTC destination address, how and where I can configure if the destination array is present in another file. e.g. uint16_t arr[4];

    2. How array index counters will be incremented while transferring next ADC result register data via DTC? 

    3. How DTC understand counter reset and destination address will start to store again from arr[0] ? 

    Thanks & Regards, 


  • Hello,

    Please find the attached demo project.


    ANI0-ANI3 channels are scanned and stored at 0xFF400 address in RAM using DTC.

    The destination address is usually specified in Code Generator. You can declare your array to be stored in a specific address using #pragma (as done in the example) and use this address as a destination address.

    Please go through the DTC settings on Code Generator.

    Let me know if you have any questions.


  • Hi,

    Thank you for providing the Sample code.

    I have few questions regarding the same.

    1. How can we select the destination address?

    2. R_DTCD0_Start() can be called in ADC ISR as well ? 

    3. Need more details about repeat mode concept, How the address is incremented? and array data type should be uint16_t only or we can take any other data type for destination array ?

    Thanks & Regards,

  • 1) Well, if you decide to have a buffer in RAM to store the results, you need to know the memory range of RAM and select an address.

    But some regions of RAM are used for other purposes too, so you need to make sure the buffer does not overlap with them. (for example trace area for debugger, self-RAM area for flash libraries etc).

    Please take a look on page 107-108.

    2) Yes, but the interrupt that called the ISR will not trigger the DTC. The next interrupt will.

    3) The address is incremented automatically if it selected on Code Generator. The type of data can be different but if you have a 10-bit result, what else can it be ?

    For Repeat mode please look into section 19.3.3



Reply Children
  • Regarding answer no.2 

    If next interrupt will trigger/call DTC data transfer, then we will lose the ADC data of first channel from ADCR register right?

    If yes, then may i know why DTC will not be triggered in the ISR where DTC is called?

    If no, can you please explain how we will not lose the data of 1st channel ADC converted data?

  • If the DTC is enabled after the interrupt, the interrupt itself cannot trigger the DTC transfer.

    Starting DTC inside the ISR cannot transfer the 1st result.

  • If DTC transfer will not trigger then it will not increment the address, right?

  • No it will not. The increment will happen after an activation source.

  • Ok, Here few queries i have as below 

    1. if DTC triggered inside any kind of ISR, DTC will skip first data transfer for all kind of interrupts. correct?

    2. ADC conversion end will only set DTCEN1.bit_no6 right? it cannot trigger DTC transfer automatically without calling R_DTCD0_Start() ?

    3. Regarding activation source, If activation source is ADC and DTCEN1.bit_no6 is set then automatically address will be incremented without calling R_DTCD0_Start() ?

  • 1) It is not like it skips, it is not yet active so it cannot be triggered by something that occurred in the past.

    2) ADC conversion end does not set anything, it just triggers the activation source. The transfers start and stop when:

    3) Yes. In this case the DTC will do a transfer and increment if needed.

  • 1.

    Please correct me if im wrong,

    When ADC conversion end will trigger the activation source automatically and it will set DTCEN1.bitno6 then without calling R_DTCD0_Start() externally as per below code snap, the transfer will be initiated, and address will be incremented in repeat mode. Correct ?

    If yes, Then what is the use of R_DTCD0_Start() function ?

    2. What will happen next when incremented address reach to last index of the array ? I want to start from 0th index again once it will store all the adc channel data till 4th index

  • 1) R_DTCD0_Start makes sure the DTCEN1 bit is 1 so the DTC transfer is enabled.

    2) This is what is done in repeat mode. The source or destination address is incremented until a point where it goes back to the initial address. Please read the datasheet and look into the DTC configurations of the project

  • 1. But without calling this function as well DTC activation will be triggered after ADC conversion end and DTC transfer will happen, right? or it is mandatory to call  R_DTCD0_Start() function at every end of ADC conversion.

  • It depends on whether the interrupt generation is enabled or disabled:

    The DTCEN bits will be changed from 1 to 0 while RPTINT is 1 in repeat mode.