RL78 F13 - Needed sample code to understand DTC functionality with ADC Scan One shot mode

Dear Renesas community,

I'm looking for sample code to understand DTC with ADC scan one shot mode.

Needed scenario like 4 ADC channels conversion data want to transfer from ADCR to 4 different variables at each INTAD interrupt.

and 4 variables like arr[index], index value will be incremented at each INTAD interrupt. and index will be reseted after 4th channel ADC conversion

Could you please provide the sample code for the same?

Thanks & Regards,

Meet

Parents
  • Hello,

    Yes, I can provide this for you. 

    So when the INTAD occurs, you want to store the 4 results of the 4 ADC channels in a buffer using DTC, correct ?

  • Yes, every trigger of ADC SOC will generates 4 INTAD interrupts one by one after EOC(end of ADC conversation). 

    Steps: 

    1. So when 1st interrupt comes, transfer the result from ADC result register(source address is fixed for DTC) to arr[0] register. 

    2. Then when 2nd INTAD interrupt comes after 2nd channel ADC EOC, same ADC result register data should be copied to arr[1].

    3. Likewise for 3rd and 4th interrupt, DTC should transfer the ADC result register data into arr[2] and arr[3]. 

    4. Then array counter will reset and next trigger of ADC SOC, will start again and repeat steps from point no 1.

    Note :  I have considered 16 bit data transfer for 10bit ADC. 

    Kindly consider above scenario for sample code. 

    In addition, I have few queries as mentioned below - 

    1. for DTC destination address, how and where I can configure if the destination array is present in another file. e.g. uint16_t arr[4];

    2. How array index counters will be incremented while transferring next ADC result register data via DTC? 

    3. How DTC understand counter reset and destination address will start to store again from arr[0] ? 

    Thanks & Regards, 

    Meet

  • Ok, Here few queries i have as below 

    1. if DTC triggered inside any kind of ISR, DTC will skip first data transfer for all kind of interrupts. correct?

    2. ADC conversion end will only set DTCEN1.bit_no6 right? it cannot trigger DTC transfer automatically without calling R_DTCD0_Start() ?

    3. Regarding activation source, If activation source is ADC and DTCEN1.bit_no6 is set then automatically address will be incremented without calling R_DTCD0_Start() ?

  • 1) It is not like it skips, it is not yet active so it cannot be triggered by something that occurred in the past.

    2) ADC conversion end does not set anything, it just triggers the activation source. The transfers start and stop when:

    3) Yes. In this case the DTC will do a transfer and increment if needed.

  • 1.

    Please correct me if im wrong,

    When ADC conversion end will trigger the activation source automatically and it will set DTCEN1.bitno6 then without calling R_DTCD0_Start() externally as per below code snap, the transfer will be initiated, and address will be incremented in repeat mode. Correct ?

    If yes, Then what is the use of R_DTCD0_Start() function ?

    2. What will happen next when incremented address reach to last index of the array ? I want to start from 0th index again once it will store all the adc channel data till 4th index

  • 1) R_DTCD0_Start makes sure the DTCEN1 bit is 1 so the DTC transfer is enabled.

    2) This is what is done in repeat mode. The source or destination address is incremented until a point where it goes back to the initial address. Please read the datasheet and look into the DTC configurations of the project

  • 1. But without calling this function as well DTC activation will be triggered after ADC conversion end and DTC transfer will happen, right? or it is mandatory to call  R_DTCD0_Start() function at every end of ADC conversion.

  • It depends on whether the interrupt generation is enabled or disabled:

    The DTCEN bits will be changed from 1 to 0 while RPTINT is 1 in repeat mode.

  • Hi,

    Here I have some queries regarding 1st point,

    1. You said : But some regions of RAM are used for other purposes too", 

    So for this, where i can get detailed information of RAM usage, like what part of RAM used for library, stack area etc.

    2. #pragma address macro is used to create/reserve a section under the RAM area during build time?

    3.  can we achieve this by defining the memory section in below compiler settings? and how to calculate the memory if i need uint16_t arr[4] ; so how can i add section here ?

    can you please modify the sample code and provide the added section entry in below setting instead of using #pragma address, if possible.?

  • 1) The reserved areas are explained on the pages I mentioned. If the project uses a flash library, the self-RAM area should also be reserved. You can find the self-RAM area of your device on this document.

    https://www.renesas.com/us/en/document/mat/rl78-family-self-ram-list-flash-self-programming-library-rev305

    2) The #pragma address macro is used to tell the linker to put the adc_buffer in the specific address. It does not reserve anything in memory. 

    3) You could create a new section in RAM, but you would still need to tell the linker to put the adc_buffer inside this section. So you do not gain anything from doing this. It is basically the same process.

  • How to select the flash library?

  • If you have a flash library question please create a new post. 

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