#include "hal_data.h" #define ETHER_EXAMPLE_MAXIMUM_ETHERNET_FRAME_SIZE (1514) #define ETHER_EXAMPLE_TRANSMIT_ETHERNET_FRAME_SIZE (60) #define ETHER_EXAMPLE_SOURCE_MAC_ADDRESS 0x74, 0x90, 0x50, 0x00, 0x79, 0x01 #define ETHER_EXAMPLE_DESTINATION_MAC_ADDRESS 0x74, 0x90, 0x50, 0x00, 0x79, 0x02 #define ETHER_EXAMPLE_FRAME_TYPE 0x00, 0x2E #define ETHER_EXAMPLE_PAYLOAD 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ /* Receive data buffer */ static uint8_t gp_read_buffer[ETHER_EXAMPLE_MAXIMUM_ETHERNET_FRAME_SIZE] = {0}; /* Transmit data buffer */ static uint8_t gp_send_data[ETHER_EXAMPLE_TRANSMIT_ETHERNET_FRAME_SIZE] = { ETHER_EXAMPLE_DESTINATION_MAC_ADDRESS, /* Destination MAC address */ ETHER_EXAMPLE_SOURCE_MAC_ADDRESS, /* Source MAC address */ ETHER_EXAMPLE_FRAME_TYPE, /* Type field */ ETHER_EXAMPLE_PAYLOAD /* Payload value (46byte) */ }; FSP_CPP_HEADER void R_BSP_WarmStart(bsp_warm_start_event_t event); FSP_CPP_FOOTER /*******************************************************************************************************************//** * main() is generated by the RA Configuration editor and is used to generate threads if an RTOS is used. This function * is called by main() when no RTOS is used. **********************************************************************************************************************/ void hal_entry(void) { /* TODO: add your own code here */ fsp_err_t err = FSP_SUCCESS; //PHY chip RESET R_PORT4->PODR_b.PODR5 = 0; R_PORT4->PDR_b.PDR5 = 1; R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MILLISECONDS); R_PORT4->PODR_b.PODR5 = 1; R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MILLISECONDS); /* Source MAC Address */ static uint8_t mac_address_source[6] = {ETHER_EXAMPLE_SOURCE_MAC_ADDRESS}; uint32_t read_data_size = 0; //g_ether0_cfg.p_mac_address = mac_address_source; /* Open the ether instance with initial configuration. */ err = R_ETHER_Open(&g_ether0_ctrl, &g_ether0_cfg); /* Handle any errors. This function should be defined by the user. */ assert(FSP_SUCCESS == err); do { /* When the Ethernet link status read from the PHY-LSI Basic Status register is link-up, * Initializes the module and make auto negotiation. */ err = R_ETHER_LinkProcess(&g_ether0_ctrl); } while (FSP_SUCCESS != err); /* Transmission is non-blocking. */ /* User data copy to internal buffer and is transferred by DMA in the background. */ err = R_ETHER_Write(&g_ether0_ctrl, (void *) gp_send_data, sizeof(gp_send_data)); assert(FSP_SUCCESS == err); /* received data copy to user buffer from internal buffer. */ err = R_ETHER_Read(&g_ether0_ctrl, (void *) gp_read_buffer, &read_data_size); assert(FSP_SUCCESS == err); /* Disable transmission and receive function and close the ether instance. */ R_ETHER_Close(&g_ether0_ctrl); while(1) { __NOP(); } #if BSP_TZ_SECURE_BUILD /* Enter non-secure code */ R_BSP_NonSecureEnter(); #endif } /*******************************************************************************************************************//** * This function is called at various points during the startup process. This implementation uses the event that is * called right before main() to set up the pins. * * @param[in] event Where at in the start up process the code is currently at **********************************************************************************************************************/ void R_BSP_WarmStart(bsp_warm_start_event_t event) { if (BSP_WARM_START_RESET == event) { #if BSP_FEATURE_FLASH_LP_VERSION != 0 /* Enable reading from data flash. */ R_FACI_LP->DFLCTL = 1U; /* Would normally have to wait tDSTOP(6us) for data flash recovery. Placing the enable here, before clock and * C runtime initialization, should negate the need for a delay since the initialization will typically take more than 6us. */ #endif } if (BSP_WARM_START_POST_C == event) { /* C runtime environment and system clocks are setup. */ /* Configure pins. */ R_IOPORT_Open (&IOPORT_CFG_CTRL, &IOPORT_CFG_NAME); #if BSP_CFG_SDRAM_ENABLED /* Setup SDRAM and initialize it. Must configure pins first. */ R_BSP_SdramInit(true); #endif } } #if BSP_TZ_SECURE_BUILD FSP_CPP_HEADER BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable (); /* Trustzone Secure Projects require at least one nonsecure callable function in order to build (Remove this if it is not required to build). */ BSP_CMSE_NONSECURE_ENTRY void template_nonsecure_callable () { } FSP_CPP_FOOTER #endif void ether_callback(ether_callback_args_t * p) { __NOP(); }