I've got an old project that was running on SSP 1.2.1 on a S5D9 and running sort of right. It has some sort of bug in the I2C driver that another project (on the same board) running on SSP 1.7.5 does not so I figured I'd port things to that platform and work from there.
That's where the trouble is coming in. On this platform, I'm having problems opening the I2S channel (the other project, which is also on SSP 1.7.5 has no problem doing that). I've looked at the generated code for that and find no substantial differences between them. What it's doing on this one is that it gets to the code in r_ssi.c
if (NULL != p_cfg->p_transfer_rx) { p_cfg->p_transfer_rx->p_cfg->p_info->p_src = (void *) HW_SSI_RxAddrGet(p_ctrl->p_reg); err = ssi_transfer_configure(p_cfg, p_feature, p_cfg->p_transfer_rx, SSP_SIGNAL_SSI_RXI); SSI_ERROR_RETURN((SSP_SUCCESS == err), err); }
And this has got a p_transfer_rx (I don't need to read from this thing; it's master to my audio amps) and when it gets the the ssi_transfer_configure it returns SSP_ERR_IRQ_BSP_DISABLED which is true enough. So it is in the other project that doesn't have this problem too. I don't need to read these things, just write 'em
I've gone though the properties of all these blocks and compared them to the project that works and I don't see a difference at all. I'll attach the generated code here too (I think I did anyway)
This is leaving me with one of those eh? things... I don't see a difference between the running and non-running one but for the life of me I can't figure out why it doesn't like it. I'm guessing there is some setting somewhere else that's a problem but don't know where to look for this...
Any hints?
I did an experiment here this morning and deleted the middle (Rx) DTC driver on here. I have no recollection of why it's there to being with but my other (working) project has it so apparently it doesn…
oddly enough this isn't allowing a file upload so I've got something with this browser.... let me do the appropriate file inline:
/* generated thread source file - do not edit */#include "audio_thread.h"TX_THREAD audio_thread;void audio_thread_create(void);static void audio_thread_func(ULONG thread_input);static uint8_t audio_thread_stack[512] BSP_PLACE_IN_SECTION_V2(".stack.audio_thread") BSP_ALIGN_VARIABLE_V2(BSP_STACK_ALIGNMENT);void tx_startup_err_callback(void *p_instance, void *p_data);void tx_startup_common_init(void);#if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_timer0) && !defined(SSP_SUPPRESS_ISR_GPT6)SSP_VECTOR_DEFINE_CHAN(gpt_counter_overflow_isr, GPT, COUNTER_OVERFLOW, 6);#endif#endifstatic gpt_instance_ctrl_t g_timer0_ctrl;static const timer_on_gpt_cfg_t g_timer0_extend = { .gtioca = { .output_enabled = false, .stop_level = GPT_PIN_LEVEL_LOW }, .gtiocb = { .output_enabled = true, .stop_level = GPT_PIN_LEVEL_RETAINED }, .shortest_pwm_signal = GPT_SHORTEST_LEVEL_OFF, };static const timer_cfg_t g_timer0_cfg = { .mode = TIMER_MODE_PERIODIC, .period = 705600 * 2, .unit = TIMER_UNIT_FREQUENCY_HZ, .duty_cycle = 50, .duty_cycle_unit = TIMER_PWM_UNIT_RAW_COUNTS, .channel = 6, .autostart = false, .p_callback = NULL, .p_context = &g_timer0, .p_extend = &g_timer0_extend, .irq_ipl = (BSP_IRQ_DISABLED), };/* Instance structure to use this module. */const timer_instance_t g_timer0 = { .p_ctrl = &g_timer0_ctrl, .p_cfg = &g_timer0_cfg, .p_api = &g_timer_on_gpt };#if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_transfer13) && !defined(SSP_SUPPRESS_ISR_DTCELC_EVENT_ELC_SOFTWARE_EVENT_0)#define DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_0);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0#endif#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_1) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_1);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1#endif#endif#endifdtc_instance_ctrl_t g_transfer13_ctrl;transfer_info_t g_transfer13_info = { .dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .repeat_area = TRANSFER_REPEAT_AREA_DESTINATION, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_4_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, };const transfer_cfg_t g_transfer13_cfg = { .p_info = &g_transfer13_info, .activation_source = ELC_EVENT_ELC_SOFTWARE_EVENT_0, .auto_enable = false, .p_callback = NULL, .p_context = &g_transfer13, .irq_ipl = (BSP_IRQ_DISABLED) };/* Instance structure to use this module. */const transfer_instance_t g_transfer13 = { .p_ctrl = &g_transfer13_ctrl, .p_cfg = &g_transfer13_cfg, .p_api = &g_transfer_on_dtc };#if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_transfer4) && !defined(SSP_SUPPRESS_ISR_DTCELC_EVENT_SSI0_TXI)#define DTC_ACTIVATION_SRC_ELC_EVENT_SSI0_TXI#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_0);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0#endif#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_1) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_1);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1#endif#endif#endifdtc_instance_ctrl_t g_transfer4_ctrl;transfer_info_t g_transfer4_info = { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .size = TRANSFER_SIZE_4_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, };const transfer_cfg_t g_transfer4_cfg = { .p_info = &g_transfer4_info, .activation_source = ELC_EVENT_SSI0_TXI, .auto_enable = false, .p_callback = NULL, .p_context = &g_transfer4, .irq_ipl = (BSP_IRQ_DISABLED) };/* Instance structure to use this module. */const transfer_instance_t g_transfer4 = { .p_ctrl = &g_transfer4_ctrl, .p_cfg = &g_transfer4_cfg, .p_api = &g_transfer_on_dtc };#if (0) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_i2s0) && !defined(SSP_SUPPRESS_ISR_SSI)#if 1 == 0 // Channel 1 has one event for TXI or RXISSP_VECTOR_DEFINE_CHAN(ssi_txi_isr, SSI, TXI_RXI, 0);#elseSSP_VECTOR_DEFINE_CHAN(ssi_txi_isr, SSI, TXI, 0);#endif#endif#endif#if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_i2s0) && !defined(SSP_SUPPRESS_ISR_SSI)#if 1 == 0 // Channel 1 has one event for TXI or RXISSP_VECTOR_DEFINE_CHAN(ssi_rxi_isr, SSI, TXI_RXI, 0);#elseSSP_VECTOR_DEFINE_CHAN(ssi_rxi_isr, SSI, RXI, 0);#endif#endif#endif#if (2) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_i2s0) && !defined(SSP_SUPPRESS_ISR_SSI)SSP_VECTOR_DEFINE_CHAN(ssi_int_isr, SSI, INT, 0);#endif#endifssi_instance_ctrl_t g_i2s0_ctrl;/** SSI instance configuration */const i2s_on_ssi_cfg_t g_i2s0_cfg_extend = { .audio_clock = SSI_AUDIO_CLOCK_EXTERNAL, };/** I2S interface configuration */const i2s_cfg_t g_i2s0_cfg = { .channel = 0, .pcm_width = I2S_PCM_WIDTH_8_BITS, .operating_mode = I2S_MODE_MASTER, .audio_clk_freq_hz = 705600, .sampling_freq_hz = 22050, .word_length = I2S_WORD_LENGTH_16_BITS, .ws_continue = I2S_WS_CONTINUE_ON, .p_callback = AMP2_OnBlockSent, .p_context = &g_i2s0, .p_extend = &g_i2s0_cfg_extend, .txi_ipl = (0), .rxi_ipl = (BSP_IRQ_DISABLED), .idle_err_ipl = (2),#define SYNERGY_NOT_DEFINED (1)#if (SYNERGY_NOT_DEFINED == g_transfer4) .p_transfer_tx = NULL,#else .p_transfer_tx = &g_transfer4,#endif#if (SYNERGY_NOT_DEFINED == g_transfer13) .p_transfer_rx = NULL,#else .p_transfer_rx = &g_transfer13,#endif#if (SYNERGY_NOT_DEFINED == g_timer0) .p_timer = NULL,#else .p_timer = &g_timer0,#endif#undef SYNERGY_NOT_DEFINED };/* Instance structure to use this module. */const i2s_instance_t g_i2s0 = { .p_ctrl = &g_i2s0_ctrl, .p_cfg = &g_i2s0_cfg, .p_api = &g_i2s_on_ssi };#if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_transfer12) && !defined(SSP_SUPPRESS_ISR_DTCELC_EVENT_SPI1_RXI)#define DTC_ACTIVATION_SRC_ELC_EVENT_SPI1_RXI#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_0);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0#endif#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_1) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_1);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1#endif#endif#endifdtc_instance_ctrl_t g_transfer12_ctrl;transfer_info_t g_transfer12_info = { .dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .repeat_area = TRANSFER_REPEAT_AREA_DESTINATION, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_2_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, };const transfer_cfg_t g_transfer12_cfg = { .p_info = &g_transfer12_info, .activation_source = ELC_EVENT_SPI1_RXI, .auto_enable = false, .p_callback = NULL, .p_context = &g_transfer12, .irq_ipl = (BSP_IRQ_DISABLED) };/* Instance structure to use this module. */const transfer_instance_t g_transfer12 = { .p_ctrl = &g_transfer12_ctrl, .p_cfg = &g_transfer12_cfg, .p_api = &g_transfer_on_dtc };#if (BSP_IRQ_DISABLED) != BSP_IRQ_DISABLED#if !defined(SSP_SUPPRESS_ISR_g_transfer10) && !defined(SSP_SUPPRESS_ISR_DTCELC_EVENT_SPI1_TXI)#define DTC_ACTIVATION_SRC_ELC_EVENT_SPI1_TXI#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_0) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_0);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_0#endif#if defined(DTC_ACTIVATION_SRC_ELC_EVENT_ELC_SOFTWARE_EVENT_1) && !defined(DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1)SSP_VECTOR_DEFINE(elc_software_event_isr, ELC, SOFTWARE_EVENT_1);#define DTC_VECTOR_DEFINED_SOFTWARE_EVENT_1#endif#endif#endifdtc_instance_ctrl_t g_transfer10_ctrl;transfer_info_t g_transfer10_info = { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .size = TRANSFER_SIZE_2_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, };const transfer_cfg_t g_transfer10_cfg = { .p_info = &g_transfer10_info, .activation_source = ELC_EVENT_SPI1_TXI, .auto_enable = false, .p_callback = NULL, .p_context = &g_transfer10, .irq_ipl = (BSP_IRQ_DISABLED) };/* Instance structure to use this module. */const transfer_instance_t g_transfer10 = { .p_ctrl = &g_transfer10_ctrl, .p_cfg = &g_transfer10_cfg, .p_api = &g_transfer_on_dtc };#define RSPI_TRANSFER_SIZE_1_BYTE (0x52535049)#define RSPI_SYNERGY_NOT_DEFINED 1#if (RSPI_SYNERGY_NOT_DEFINED != RSPI_TRANSFER_SIZE_2_BYTE)dtc_instance_ctrl_t g_spi0_transfer_tx_ctrl;uint32_t g_spi0_tx_inter = 0;transfer_info_t g_spi0_transfer_tx_info[2] = {#if (RSPI_TRANSFER_SIZE_1_BYTE == RSPI_TRANSFER_SIZE_2_BYTE) { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_EACH, .src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .size = TRANSFER_SIZE_1_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) &g_spi0_tx_inter, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, }, { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_4_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) &g_spi0_tx_inter, .num_blocks = 0, .length = 0, },#else { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .size = TRANSFER_SIZE_2_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, }, { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_4_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) &g_spi0_tx_inter, .num_blocks = 0, .length = 0, },#endif };const transfer_cfg_t g_spi0_transfer_tx_cfg = { .p_info = g_spi0_transfer_tx_info, .activation_source = ELC_EVENT_SPI1_TXI, .auto_enable = false, .p_callback = NULL, .p_context = &g_spi0_transfer_tx, .irq_ipl = (BSP_IRQ_DISABLED) };/* Instance structure to use this module. */const transfer_instance_t g_spi0_transfer_tx = { .p_ctrl = &g_spi0_transfer_tx_ctrl, .p_cfg = &g_spi0_transfer_tx_cfg, .p_api = &g_transfer_on_dtc };dtc_instance_ctrl_t g_spi0_transfer_rx_ctrl;uint32_t g_spi0_rx_inter = 0;transfer_info_t g_spi0_transfer_rx_info[2] = {#if (RSPI_TRANSFER_SIZE_1_BYTE == RSPI_TRANSFER_SIZE_2_BYTE) { .dest_addr_mode = TRANSFER_ADDR_MODE_FIXED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_EACH, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_4_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) &g_spi0_rx_inter, .p_src = (void const *) NULL, .num_blocks = 0, .length = 0, }, { .dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_1_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) &g_spi0_rx_inter, .num_blocks = 0, .length = 0, },#else { .dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .repeat_area = TRANSFER_REPEAT_AREA_DESTINATION, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_2_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) NULL, .num_blocks = 0, }, { .dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED, .repeat_area = TRANSFER_REPEAT_AREA_SOURCE, .irq = TRANSFER_IRQ_END, .chain_mode = TRANSFER_CHAIN_MODE_DISABLED, .src_addr_mode = TRANSFER_ADDR_MODE_FIXED, .size = TRANSFER_SIZE_1_BYTE, .mode = TRANSFER_MODE_NORMAL, .p_dest = (void *) NULL, .p_src = (void const *) &g_spi0_rx_inter, .num_blocks = 0, .length = 0, },#endif };const transfer_cfg_t g_spi0_transfer_rx_cfg = { .p_info = g_spi0_transfer_rx_info, .activation_source = ELC_EVENT_SPI1_RXI, .auto_enable = false, .p_callback = NULL, .p_context = &g_spi0_transfer_rx, .irq_ipl = (BSP_IRQ_DISABLED) };/* Instance structure to use this module. */const transfer_instance_t g_spi0_transfer_rx = { .p_ctrl = &g_spi0_transfer_rx_ctrl, .p_cfg = &g_spi0_transfer_rx_cfg, .p_api = &g_transfer_on_dtc };#endif#undef RSPI_TRANSFER_SIZE_1_BYTE #undef RSPI_SYNERGY_NOT_DEFINED#if !defined(SSP_SUPPRESS_ISR_g_spi0) && !defined(SSP_SUPPRESS_ISR_SPI1)SSP_VECTOR_DEFINE_CHAN(spi_rxi_isr, SPI, RXI, 1);#endif#if !defined(SSP_SUPPRESS_ISR_g_spi0) && !defined(SSP_SUPPRESS_ISR_SPI1)SSP_VECTOR_DEFINE_CHAN(spi_txi_isr, SPI, TXI, 1);#endif#if !defined(SSP_SUPPRESS_ISR_g_spi0) && !defined(SSP_SUPPRESS_ISR_SPI1)SSP_VECTOR_DEFINE_CHAN(spi_eri_isr, SPI, ERI, 1);#endif#if !defined(SSP_SUPPRESS_ISR_g_spi0) && !defined(SSP_SUPPRESS_ISR_SPI1)SSP_VECTOR_DEFINE_CHAN(spi_tei_isr, SPI, TEI, 1);#endifrspi_instance_ctrl_t g_spi0_ctrl;/** RSPI extended configuration for RSPI HAL driver */const spi_on_rspi_cfg_t g_spi0_ext_cfg = { .rspi_clksyn = RSPI_OPERATION_SPI,/* Communication mode is configured by the driver. write calls use TX_ONLY. read and writeRead use FULL_DUPLEX. */.rspi_comm = RSPI_COMMUNICATION_FULL_DUPLEX, .ssl_polarity.rspi_ssl0 = RSPI_SSLP_LOW, .loopback.rspi_loopback1 = RSPI_LOOPBACK1_NORMAL_DATA, .loopback.rspi_loopback2 = RSPI_LOOPBACK2_NORMAL_DATA, .mosi_idle.rspi_mosi_idle_fixed_val = RSPI_MOSI_IDLE_FIXED_VAL_HIGH, .mosi_idle.rspi_mosi_idle_val_fixing = RSPI_MOSI_IDLE_VAL_FIXING_ENABLE, .parity.rspi_parity = RSPI_PARITY_STATE_DISABLE, .parity.rspi_parity_mode = RSPI_PARITY_MODE_ODD, .ssl_select = RSPI_SSL_SELECT_SSL0, .ssl_level_keep = RSPI_SSL_LEVEL_KEEP_NOT, .clock_delay.rspi_clock_delay_count = RSPI_CLOCK_DELAY_COUNT_1, .clock_delay.rspi_clock_delay_state = RSPI_CLOCK_DELAY_STATE_DISABLE, .ssl_neg_delay.rspi_ssl_neg_delay_count = RSPI_SSL_NEGATION_DELAY_1, .ssl_neg_delay.rspi_ssl_neg_delay_state = RSPI_SSL_NEGATION_DELAY_DISABLE, .access_delay.rspi_next_access_delay_count = RSPI_NEXT_ACCESS_DELAY_COUNT_1, .access_delay.rspi_next_access_delay_state = RSPI_NEXT_ACCESS_DELAY_STATE_DISABLE, .byte_swap = RSPI_BYTE_SWAP_DISABLE, };const spi_cfg_t g_spi0_cfg = { .channel = 1, .operating_mode = SPI_MODE_MASTER, .clk_phase = SPI_CLK_PHASE_EDGE_EVEN, .clk_polarity = SPI_CLK_POLARITY_HIGH, .mode_fault = SPI_MODE_FAULT_ERROR_DISABLE, .bit_order = SPI_BIT_ORDER_MSB_FIRST, .bitrate = 8000000, .p_transfer_tx = g_spi0_P_TRANSFER_TX, .p_transfer_rx = g_spi0_P_TRANSFER_RX, .p_callback = AudioMem_OnBlockReceived, .p_context = (void *) &g_spi0, .p_extend = (void *) &g_spi0_ext_cfg, .rxi_ipl = (0), .txi_ipl = (0), .eri_ipl = (2), .tei_ipl = (0), };/* Instance structure to use this module. */const spi_instance_t g_spi0 = { .p_ctrl = &g_spi0_ctrl, .p_cfg = &g_spi0_cfg, .p_api = &g_spi_on_rspi };sf_spi_instance_ctrl_t g_sf_spi_device0_ctrl = { .p_lower_lvl_ctrl = &g_spi0_ctrl, };const sf_spi_cfg_t g_sf_spi_device0_cfg = { .p_bus = (sf_spi_bus_t *) &g_sf_spi_bus0, .chip_select = IOPORT_PORT_03_PIN_13, .chip_select_level_active = IOPORT_LEVEL_LOW, .p_lower_lvl_cfg = &g_spi0_cfg, };/* Instance structure to use this module. */const sf_spi_instance_t g_sf_spi_device0 = { .p_ctrl = &g_sf_spi_device0_ctrl, .p_cfg = &g_sf_spi_device0_cfg, .p_api = &g_sf_spi_on_sf_spi };#if !defined(SSP_SUPPRESS_ISR_g_i2c3) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_rxi_isr, IIC, RXI, 2);#endif#if !defined(SSP_SUPPRESS_ISR_g_i2c3) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_txi_isr, IIC, TXI, 2);#endif#if !defined(SSP_SUPPRESS_ISR_g_i2c3) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_tei_isr, IIC, TEI, 2);#endif#if !defined(SSP_SUPPRESS_ISR_g_i2c3) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_eri_isr, IIC, ERI, 2);#endifriic_instance_ctrl_t g_i2c3_ctrl;const riic_extended_cfg g_i2c3_extend = { .timeout_mode = RIIC_TIMEOUT_MODE_SHORT, };const i2c_cfg_t g_i2c3_cfg = { .channel = 2, .rate = I2C_RATE_FAST, .slave = 0x6D, .addr_mode = I2C_ADDR_MODE_7BIT, .sda_delay = 0,#define SYNERGY_NOT_DEFINED (1) #if (SYNERGY_NOT_DEFINED == SYNERGY_NOT_DEFINED) .p_transfer_tx = NULL,#else .p_transfer_tx = &SYNERGY_NOT_DEFINED,#endif#if (SYNERGY_NOT_DEFINED == SYNERGY_NOT_DEFINED) .p_transfer_rx = NULL,#else .p_transfer_rx = &SYNERGY_NOT_DEFINED,#endif#undef SYNERGY_NOT_DEFINED .p_callback = NULL, .p_context = (void *) &g_i2c3, .rxi_ipl = (2), .txi_ipl = (2), .tei_ipl = (2), .eri_ipl = (2), .p_extend = &g_i2c3_extend, };/* Instance structure to use this module. */const i2c_master_instance_t g_i2c3 = { .p_ctrl = &g_i2c3_ctrl, .p_cfg = &g_i2c3_cfg, .p_api = &g_i2c_master_on_riic };sf_i2c_instance_ctrl_t g_sf_i2c_device2_ctrl = { .p_lower_lvl_ctrl = &g_i2c3_ctrl, };const sf_i2c_cfg_t g_sf_i2c_device2_cfg = { .p_bus = (sf_i2c_bus_t *) &g_sf_i2c_bus0, .p_lower_lvl_cfg = &g_i2c3_cfg, };/* Instance structure to use this module. */const sf_i2c_instance_t g_sf_i2c_device2 = { .p_ctrl = &g_sf_i2c_device2_ctrl, .p_cfg = &g_sf_i2c_device2_cfg, .p_api = &g_sf_i2c_on_sf_i2c };#if !defined(SSP_SUPPRESS_ISR_g_i2c2) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_rxi_isr, IIC, RXI, 2);#endif#if !defined(SSP_SUPPRESS_ISR_g_i2c2) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_txi_isr, IIC, TXI, 2);#endif#if !defined(SSP_SUPPRESS_ISR_g_i2c2) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_tei_isr, IIC, TEI, 2);#endif#if !defined(SSP_SUPPRESS_ISR_g_i2c2) && !defined(SSP_SUPPRESS_ISR_IIC2)SSP_VECTOR_DEFINE_CHAN(iic_eri_isr, IIC, ERI, 2);#endifriic_instance_ctrl_t g_i2c2_ctrl;const riic_extended_cfg g_i2c2_extend = { .timeout_mode = RIIC_TIMEOUT_MODE_SHORT, };const i2c_cfg_t g_i2c2_cfg = { .channel = 2, .rate = I2C_RATE_FAST, .slave = 0x6C, .addr_mode = I2C_ADDR_MODE_7BIT, .sda_delay = 0,#define SYNERGY_NOT_DEFINED (1) #if (SYNERGY_NOT_DEFINED == SYNERGY_NOT_DEFINED) .p_transfer_tx = NULL,#else .p_transfer_tx = &SYNERGY_NOT_DEFINED,#endif#if (SYNERGY_NOT_DEFINED == SYNERGY_NOT_DEFINED) .p_transfer_rx = NULL,#else .p_transfer_rx = &SYNERGY_NOT_DEFINED,#endif#undef SYNERGY_NOT_DEFINED .p_callback = NULL, .p_context = (void *) &g_i2c2, .rxi_ipl = (6), .txi_ipl = (6), .tei_ipl = (6), .eri_ipl = (6), .p_extend = &g_i2c2_extend, };/* Instance structure to use this module. */const i2c_master_instance_t g_i2c2 = { .p_ctrl = &g_i2c2_ctrl, .p_cfg = &g_i2c2_cfg, .p_api = &g_i2c_master_on_riic };sf_i2c_instance_ctrl_t g_sf_i2c_device1_ctrl = { .p_lower_lvl_ctrl = &g_i2c2_ctrl, };const sf_i2c_cfg_t g_sf_i2c_device1_cfg = { .p_bus = (sf_i2c_bus_t *) &g_sf_i2c_bus0, .p_lower_lvl_cfg = &g_i2c2_cfg, };/* Instance structure to use this module. */const sf_i2c_instance_t g_sf_i2c_device1 = { .p_ctrl = &g_sf_i2c_device1_ctrl, .p_cfg = &g_sf_i2c_device1_cfg, .p_api = &g_sf_i2c_on_sf_i2c };extern bool g_ssp_common_initialized;extern uint32_t g_ssp_common_thread_count;extern TX_SEMAPHORE g_ssp_common_initialized_semaphore;void audio_thread_create(void) { /* Increment count so we will know the number of ISDE created threads. */ g_ssp_common_thread_count++; /* Initialize each kernel object. */ UINT err; err = tx_thread_create(&audio_thread, (CHAR *) "Audio Thread", audio_thread_func, (ULONG) NULL, &audio_thread_stack, 512, 1, 1, 1, TX_AUTO_START); if (TX_SUCCESS != err) { tx_startup_err_callback(&audio_thread, 0); }}static void audio_thread_func(ULONG thread_input) { /* Not currently using thread_input. */ SSP_PARAMETER_NOT_USED(thread_input); /* Initialize common components */ tx_startup_common_init(); /* Initialize each module instance. */ /* Enter user code for this thread. */ audio_thread_entry();}