How to get UART working on RA6M5?

I'm trying to get UART working in our project. I'm working on RA6M5 MCU.
I looked at the example "ra-fsp-examples-master\ra-fsp-examples-master\example_projects\ek_ra6m5\sci_uart\sci_uart_ek_ra6m5_ep\iar" in IAR 9.10. I noticed that the TX is P101, RX is P100. For us, the TX is P409; the RX is P408. How can I change the PIN configuration to make it work for our design?
Actually I also created my project. I added the UART stack(r_sci_uart). When I tried to configure the RX and TX, I can't configure it for P408 and P409. How can I setup the PIN for RX and TX?
Is there any document about how to get UART working?

  • in the pins tab of the configurator, set the pins for SCI channel 3 :-

    Then in the properties of the SCI UART driver, set the channel you want to use, and the pin setting for that channel of SCI will be shown :-

  • Hi Jeremy,

    I selected SCI channel 3 for P408/409. The UART works. I saw some string printed out. But the characters are gibberish. They are not the proper characters. What could be wrong?

    By the way, is there a mapping table that shows the PIN vs the channels? Such as P100/P100 is channel 0, P408/P409 is channel 3, etc.

    Here is the configuration from my Smart Configurator about the UART:


  • Hi,


    I was interrupting on every received character, and....

    I was using "R_SCI_UART_Read(&g_uart0_ctrl, &rx485Char, 1);" to read chars and every second on 19K2 baud was incorrect.

    I used  "rx485Char = (uint8_t)(p_args -> data);"

    and all my problems went away

    I hope this helps

  • How are you wirting the data to the UART? The call to R_SCI_UART_Write() is not a blocking API, it will set up the write to the UART, but the completion will be signalled by the UART callback, so you should not make another call to R_SCI_UART_Write() unitl the current write transfer has finished.

  • Hi Jeremy,

    We don't call R_SCI_UART_Write(). In the sample project of "ra-fsp-examples-master\ra-fsp-examples-master\example_projects\ek_ra6m5\sci_uart\sci_uart_ek_ra6m5_ep\e2studio", there is a PIN P104 for timer. In our product, there is no such PIN for timer. Instead, we overwrite the __write() as we use IAR. This approach works in another product which uses RA2A1 MCU. Please see the implementation in attached file.


    #include "r_sci_uart.h"
    #include "r_uart_api.h"
    #include "common_data.h"
    #include "bsp_api.h"
    #include "r_ioport_api.h"
    #include "hal_data.h"
    #include "testshell.h"
    // Definitions requried for overwriding __write
    #include <yfuns.h>
    // Definitions requried for overwriding __write
    #include "string.h"
    #include "interrupt_ctl.h"
    #include "lowlevel_init.h"
    extern uint32_t RAMVECTOR_START[];       // RAM vector table
    extern uint32_t RAMVECTOR_END[];
    extern ioport_instance_ctrl_t gpio_ctrl;
    /***************UART settings*************************************************/
    sci_uart_instance_ctrl_t g_uart_ctrl;
    // no UART rx support atm.
    #define SCI_UART_CFG_RX_ENABLE                 0
    #define GPIO_PIN_UART_TX           BSP_IO_PORT_04_PIN_09
    #define GPIO_PIN_UART_RX           BSP_IO_PORT_04_PIN_08
    baud_setting_t g_uart_baud_setting =
      /* Baud rate calculated with 0.014% error. */
      .abcse = 0, 
      .abcs = 0, 
      .bgdm = 1, 
      .cks = 0, 
      .brr = 38, 
      .mddr = (uint8_t)184, 
      .brme = true
    /** UART extended configuration for UARTonSCI HAL driver */
    const sci_uart_extended_cfg_t g_uart_cfg_extend =
      .clock            = SCI_UART_CLOCK_INT,
      .rx_edge_start    = SCI_UART_START_BIT_FALLING_EDGE,
      .noise_cancel     = SCI_UART_NOISE_CANCELLATION_DISABLE,
      .rx_fifo_trigger  = SCI_UART_RX_FIFO_TRIGGER_MAX,
      .p_baud_setting   = &g_uart_baud_setting,
      .flow_control     = SCI_UART_FLOW_CONTROL_RTS,
      #if 0xFF != 0xFF
      .flow_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
      .flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
    /** UART interface configuration */
    const uart_cfg_t g_uart_cfg =
      .channel          = 3,
      .data_bits        = UART_DATA_BITS_8,
      .parity           = UART_PARITY_OFF,
      .stop_bits        = UART_STOP_BITS_1,
      .p_callback       = NULL,
      .p_context        = NULL,
      .p_extend         = &g_uart_cfg_extend,
    #define RA_NOT_DEFINED (1)
      .p_transfer_tx    = NULL,
      .p_transfer_tx    = &RA_NOT_DEFINED,
      .p_transfer_rx    = NULL,
      .p_transfer_rx    = &RA_NOT_DEFINED,
    #undef RA_NOT_DEFINED
      .rxi_ipl          = (12),
      .txi_ipl          = (12),
      .tei_ipl          = (12),
      .eri_ipl          = (12),
    #if defined(VECTOR_NUMBER_SCI3_RXI)
      .rxi_irq          = VECTOR_NUMBER_SCI3_RXI,
      .rxi_irq          = FSP_INVALID_VECTOR,
    #if defined(VECTOR_NUMBER_SCI3_TXI)
      .txi_irq          = VECTOR_NUMBER_SCI3_TXI,
      .txi_irq          = FSP_INVALID_VECTOR,
    #if defined(VECTOR_NUMBER_SCI3_TEI)
      .tei_irq          = VECTOR_NUMBER_SCI3_TEI,
      .tei_irq          = FSP_INVALID_VECTOR,
    #if defined(VECTOR_NUMBER_SCI3_ERI)
      .eri_irq          = VECTOR_NUMBER_SCI3_ERI,
      .eri_irq          = FSP_INVALID_VECTOR,
    /* Instance structure to use this module. */
    const uart_instance_t g_uart =
    { .p_ctrl = &g_uart_ctrl, .p_cfg = &g_uart_cfg, .p_api = &g_uart_on_sci };
    void dbg_uart_init(void)
      // initialize the tx pin
      R_IOPORT_PinCfg(&gpio_ctrl, GPIO_PIN_UART_TX, ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN
                                  | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9));
      // initialize the rx pin
      R_IOPORT_PinCfg(&gpio_ctrl, GPIO_PIN_UART_RX, ((uint32_t) IOPORT_CFG_PERIPHERAL_PIN
                                  | (uint32_t) IOPORT_PERIPHERAL_SCI1_3_5_7_9));
      // Initialize UART channel with baud rate 115200 & without interrupt(polling based)
      R_SCI_UART_Open(&g_uart_ctrl, &g_uart_cfg);
    *  send uart data using polling, supports only 8-bit data
    void DumpChar(char data)
       while (g_uart_ctrl.p_reg->SSR_SMCI_b.TDRE == 0);
       g_uart_ctrl.p_reg->TDR = data;
       g_uart_ctrl.p_reg->SSR_SMCI_b.TDRE = 0;
    // Write function for IAR IO layer
    size_t __write(int handle, const unsigned char * buffer, size_t size)
      size_t nChars = 0;
      if (buffer == 0)
         * This means that we should flush internal buffers.  Since we
         * don't we just return.  (Remember, "handle" == -1 means that all
         * handles should be flushed.)
        return 0;
      /* This template only writes to "standard out" and "standard err",
       * for all other file handles it returns failure. */
      if (handle != _LLIO_STDOUT && handle != _LLIO_STDERR)
        return _LLIO_ERROR;
      for (/* Empty */; size != 0; --size)
      return nChars;

  • Thanks Ian.

    Could you post more code? I'd like to see how you implement it.


  • What frequency is PCLKA configured to in your project?

  • Hi Jeremy,

    The PCLKA is 100MHz. I didn't change it.


  • Hi Jeremy,

    Please see the clock configuration from my project. I didn't change the clock. 

    What could be the problem for this issue?


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