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This applies to a RA4M1 but I suspect other devices are similar.

How do I determine whether SSEL remains asserted while more data is sent or it is negated when the current data transmission completes?

For example: M95M01 and other serial EEproms require SSEL to remain asserted whilst an entire page of data is read or written.

[locked by: Sai (SWF) at 12:48 (GMT 0) on 2 Feb 2023]
  • Hi Ian,

    Thanks for your question on Renesas Engineering Community.

    Some RA devices support SSL Signal Level Keeping in order to implement a burst transfer like in EEPROM access. If this function is supported, bit 7 of SPCMD register should be set to 1 (for example in RA6M3 ). 

    However this setting is not available for RA4M1 as there is not such an option.

    Let us know if you have more questions.



  • That seems rather final!

    I'd better write some code to set and clear SSEL.