Jlink RTT not working with simple Renesas example


I'm new to Renesas, I have the EK_RA4M2 eval kit. I'm running some examples (including Blinky) and they're working fine.

However, I cannot get JLink RTT to work. I'm following the instructions in the QuickLab document RTT_Quick_FSP_Lab_300.pdf. I selected target device R7FA4M2AD for my eval kit.

Initially, I ran the ek_ra4m2 example for adc. I could see from the code it has some RTT printfs in it. It appeared to run fine, but I get no output in the J-Link RTT viewer terminal.

Then, I tried to go simpler, and used the Blinky example, with RTT printfs. Here, I can see the LEDs blinking so I know it's running OK (in Debug mode). Again, I get nothing on the J-Link RTT viewer.

I do get what looks like correct output in the lower window of the RTT viewer (it seems to be RTT console output). This is what it shows

LOG: Connecting to J-Link via USB...
LOG: Device "R7FA4M2AD" selected.
LOG: ConfigTargetSettings() start
LOG: Configuring FlashDLNoRMWThreshold=0x200 in order to make sure that option bytes programming is done via read-modify-write
LOG: ConfigTargetSettings() end
LOG: InitTarget() start
LOG: SWD selected. Executing JTAG -> SWD switching sequence.
LOG: DAP initialized successfully.
LOG: Determining TrustZone configuration...
LOG: Secure Debug: Enabled (SSD)
LOG: Determining currently configured transfer type by reading the AHB-AP CSW register.
LOG: --> Correct transfer type configured. Done.
LOG: InitTarget() end
LOG: Found SW-DP with ID 0x6BA02477
LOG: DPIDR: 0x6BA02477
LOG: CoreSight SoC-400 or earlier
LOG: Scanning AP map to find all available APs
LOG: AP[2]: Stopped AP scan as end of AP map has been reached
LOG: AP[0]: AHB-AP (IDR: 0x84770001)
LOG: AP[1]: APB-AP (IDR: 0x54770002)
LOG: Iterating through AP map to find AHB-AP to use
LOG: AP[0]: Core found
LOG: AP[0]: AHB-AP ROM base: 0xE00FE000
LOG: CPUID register: 0x410FD214. Implementer code: 0x41 (ARM)
LOG: Feature set: Mainline
LOG: Found Cortex-M33 r0p4, Little endian.
LOG: FPUnit: 8 code (BP) slots and 0 literal slots
LOG: Security extension: implemented
LOG: Secure debug: enabled
LOG: CoreSight components:
LOG: ROMTbl[0] @ E00FE000
LOG: [0][0]: E0044000 CID B105900D PID 005BB906 DEVARCH 00000000 DEVTYPE 14 CTI (?)
LOG: [0][1]: E0047000 CID B105900D PID 003BB908 DEVARCH 00000000 DEVTYPE 12 CSTF
LOG: [0][2]: E0048000 CID B105900D PID 001BB961 DEVARCH 00000000 DEVTYPE 21 ETB
LOG: [0][3]: E0049000 CID B105F00D PID 001BB101 TSG
LOG: [0][4]: E0040000 CID B105900D PID 000BBD21 DEVARCH 00000000 DEVTYPE 11 TPIU
LOG: [0][5]: E00FF000 CID B105100D PID 000BB4C9 ROM Table
LOG: ROMTbl[1] @ E00FF000
LOG: [1][0]: E000E000 CID B105900D PID 000BBD21 DEVARCH 47702A04 DEVTYPE 00 Cortex-M33
LOG: [1][1]: E0001000 CID B105900D PID 000BBD21 DEVARCH 47701A02 DEVTYPE 00 DWT
LOG: [1][2]: E0002000 CID B105900D PID 000BBD21 DEVARCH 47701A03 DEVTYPE 00 FPB
LOG: [1][3]: E0000000 CID B105900D PID 000BBD21 DEVARCH 47701A01 DEVTYPE 43 ITM
LOG: [1][5]: E0041000 CID B105900D PID 002BBD21 DEVARCH 47724A13 DEVTYPE 13 ETM
LOG: [1][6]: E0042000 CID B105900D PID 000BBD21 DEVARCH 47701A14 DEVTYPE 14 CSS600-CTI
LOG: RTT Viewer connected.

So everything looks fine, but why do I get nothing in the terminal above?

PS I've tried the AllTerminals tab, and also Terminal 0 and Terminal 1 (I know it should just be using Terminal 0).

Any help much appreciated.

Below are the J-Link RTT settings I'm using.


Parents Reply
  • Thanks Sergey,

    That video is great, and it fixed my problem. I had also tried to set the address of the Segger RTT buffer explicitely, but using the address given in a readme file provided with the example code, for this exact eval kit. This address was different to the one that I found in the .map file, following the method in the video. 

    So I guess there must be some slight difference in the way the build was done. And also, it seems that autodetect does not necessarily work.

    Problem solved, thanks again for the quick response.


No Data