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Could not erase chip RA6M3G

cu

Hello, @supporter.

I am working on an RA6M3G device.

I tried to erase the chip using J-Flash Lite V7.92c but was unsuccessful.

I used Jlink Commander V7.92c but still failed.

Here log: 

Fullscreen log.txt Download 
SEGGER J-Link Commander V7.92c (Compiled Aug 30 2023 15:00:03)
DLL version V7.92c, compiled Aug 30 2023 14:58:23

Connecting to J-Link via USB...O.K.
Firmware: J-Link OB-S124 compiled Jun 20 2023 17:09:11
Hardware version: V1.00
J-Link uptime (since boot): 0d 00h 06m 55s
S/N: 831334275
USB speed mode: Full speed (12 MBit/s)
VTref=3.300V


Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: R7FA6M3AH
Type '?' for selection dialog
Device>
Please specify target interface:
  J) JTAG (Default)
  S) SWD
  T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "R7FA6M3AH" selected.


Connecting to target via SWD
InitTarget() start
Identifying target device...
SWD selected. Executing JTAG -> SWD switching sequence...
Initializing DAP...
DAP initialized successfully.
InitTarget() end - Took 11.2ms
Found SW-DP with ID 0x5BA02477
DPIDR: 0x5BA02477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[2]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
AP[1]: APB-AP (IDR: 0x44770002)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[0][1]: E0001000 CID B105E00D PID 003BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 003BB001 ITM
[0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
[0][5]: E0041000 CID B105900D PID 000BB925 ETM
[0][6]: E0042000 CID B105900D PID 002BB908 CSTF
[0][7]: E0043000 CID B105900D PID 001BB961 TMC
[0][8]: E0044000 CID B105F00D PID 001BB101 TSG
Memory zones:
  Zone: "Default" Description: Default access mode
Cortex-M4 identified.
J-Link>erase
No address range specified, 'Erase Chip' will be executed
'erase': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
T-bit of XPSR is 0 but should be 1. Changed to 1.
T-bit of XPSR is 0 but should be 1. Changed to 1.
Erasing device...
J-Link: Flash download: Only internal flash banks will be erased.
To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"

****** Error: Timeout while erasing sectors, RAMCode did not respond in time (PC = 0x1FFE040A, XPSR = 0x41000000, SP = 0x1FFE08C0)!
Failed to erase sectors.

J-Link: Flash download: Total time needed: 10.220s (Prepare: 0.161s, Compare: 0.000s, Erase: 10.006s, Program: 0.000s, Verify: 0.000s, Restore: 0.052s)
ERROR: Erase returned with error code -5.
J-Link>

Could you please help me check it and give me the solution?

Thank you.

Parents
  • 0

    I think the problem is in your connection. Did you supply 3.3V externally on your VCC pin of your Segger Tool and your board?

  • 0 in reply to nskrkmz

    Hello @,

    Because the RA6M3 device supports debugging on board, I using Micro USB to connect J10 (Board RA6M3) and PC. 

  • 0 in reply to cu

    Hello,

    Do you use your customized board with RA6M3 chip or the EK- RA6M3G ?

    Regards,

    AL_Renesas

  • 0 in reply to cu

    Hello,

    Please, try to re-program your board with Renesas Flash Programmer and share with me a screenshot of the messages with specific error code you get.

    Regards,

    AL_Renesas

  • 0 in reply to AL_Renesas

    Hello,

    I created the blinky project for ra6m3g and used RFP to flash.

    1./

    2./

    3./

    4./ 

  • 0 in reply to cu

    Hello,

    Please, check the possible causes for your issue, below:

    Regards

  • 0 in reply to AL_Renesas

    Hello,

    I checked the possible cause but was not successful.

    I used 1 RA6M5 and ran Renesas Device Partition Manager/RFP. It's OK.

    Is there any case of chip locked?

    Thank you.

     

  • 0 in reply to cu

    Hello, 

    RTT Viewer still connects to the board normally.

  • 0 in reply to cu

    Hello,

    If you have written data in Option Settinh Memory 0x400 in code flash, the only way to recover the flash is by trying the attached jlink script to erase the first block of code flash( as the Security MPU be enabled). If that doesn't work the device may be not recoverable.

    2260.RA6M3_Erase_Block_0.zip

    Regards

  • 0 in reply to AL_Renesas

    Hello, 

    This is log:

    SEGGER J-Link Commander V7.82d (Compiled Nov 23 2022 16:10:38)link -CommanderScript RA6M3_Block_0_Erase.jlink
    DLL version V7.82d, compiled Nov 23 2022 16:09:10


    J-Link Command File read successfully.
    Processing script file...
    J-Link>Device R7FA6M3AH
    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link OB-S124 compiled Jun 20 2023 17:09:11
    Hardware version: V1.00
    J-Link uptime (since boot): 0d 00h 27m 21s
    S/N: 831334275
    USB speed mode: Full speed (12 MBit/s)
    VTref=3.300V
    J-Link>si SWD
    Selecting SWD as current target interface.
    J-Link>speed 4000
    Selecting 4000 kHz as target interface speed
    J-Link>connect
    Device "R7FA6M3AH" selected.


    Connecting to target via SWD
    Found SW-DP with ID 0x5BA02477
    Found SW-DP with ID 0x5BA02477
    DPIDR: 0x5BA02477
    CoreSight SoC-400 or earlier
    Scanning AP map to find all available APs
    AP[2]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    AP[1]: APB-AP (IDR: 0x44770002)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
    [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
    [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
    [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
    [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
    [0][5]: E0041000 CID B105900D PID 000BB925 ETM
    [0][6]: E0042000 CID B105900D PID 002BB908 CSTF
    [0][7]: E0043000 CID B105900D PID 001BB961 TMC
    [0][8]: E0044000 CID B105F00D PID 001BB101 TSG
    Cortex-M4 identified.
    J-Link>rsettype 0
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    J-Link>h
    PC = F44F6210, CycleCnt = 00000000
    R0 = DFFE997D, R1 = BF79F66B, R2 = 78148615, R3 = 7C9EE779
    R4 = 6F9E5E0B, R5 = B1BFF157, R6 = 694EB6E7, R7 = C7FBD8F7
    R8 = EAE76113, R9 = EB3A4E3E, R10= 8BDD35E7, R11= 5D4BBDBC
    R12= FDFE675B
    SP(R13)= EA412100, MSP= EA412100, PSP= EEA1BC3C, R14(LR) = FFFFFFFF
    XPSR = 01000000: APSR = nzcvq, EPSR = 01000000, IPSR = 000 (NoException)
    CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00

    FPS0 = F4A59958, FPS1 = F1F0919A, FPS2 = 739D2079, FPS3 = 29EA7E89
    FPS4 = B2F517B4, FPS5 = 276E3839, FPS6 = 93FE8E41, FPS7 = BAB8F621
    FPS8 = EA6BFBB9, FPS9 = BEFEB612, FPS10= 71FB7FD7, FPS11= 8D18043E
    FPS12= E25BB1DA, FPS13= 6A7AF33D, FPS14= FFFF7EBE, FPS15= F17F57E1
    FPS16= 7263FE7C, FPS17= 0A8DFDC5, FPS18= 557137D9, FPS19= B32BEFD9
    FPS20= 2D3C5AFC, FPS21= DBAED1EC, FPS22= F323C96F, FPS23= 4C7A62D9
    FPS24= 3EFEF03D, FPS25= 22CACCBF, FPS26= F9FBCA4D, FPS27= 93DBEA3C
    FPS28= B0ECFC11, FPS29= C3D5E9FE, FPS30= 6ABF2DDC, FPS31= F23BAE81
    FPSCR= 00000000
    J-Link>sleep 100
    Sleep(100)
    J-Link>w2 0x4001e3fe, 0xa50B
    Writing A50B -> 4001E3FE
    J-Link>w4 0x4001e020, 0x11011221
    Writing 11011221 -> 4001E020
    J-Link>w1 0x4001E416, 0x01
    Writing 01 -> 4001E416
    J-Link>w2 0x407fe08c, 0x2d01
    Writing 2D01 -> 407FE08C
    J-Link>sleep 10
    Sleep(10)
    J-Link>w2 0x407fe08c, 0x2d00
    Writing 2D00 -> 407FE08C
    J-Link>sleep 10
    Sleep(10)
    J-Link>w2 0x407FE0E4, 0x1E04
    Writing 1E04 -> 407FE0E4
    J-Link>w2 0x407FE084, 0xAA01
    Writing AA01 -> 407FE084
    J-Link>w4 0x407FE030, 0x00000000
    Writing 00000000 -> 407FE030
    J-Link>w1 0x407E0000, 0x20
    Writing 20 -> 407E0000
    J-Link>w1 0x407E0000, 0xD0
    Writing D0 -> 407E0000
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>sleep 1000
    Sleep(1000)
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>w2 0x407FE084, 0xAA00
    Writing AA00 -> 407FE084

    Script processing completed.

    Type "connect" to establish a target connection, '?' for help
    J-Link>

    => I reset the board and re-debug again but did not success Disappointed

  • 0 in reply to cu

    Hello,

    Can you recall the sequence of operation  that you used to flash you MCU the first time? Maybe this will help to understand what have happened.

    Also, please check carefully the causes 1,2,3 Maybe, your usb cable or your power supply is the reason.

    Regards,

    AL_Renesas

Reply Children
  • 0 in reply to AL_Renesas

    Hello,

    About the sequence of operation, I flash on MCU the first time,

    I ran the unity test r_usbx_port project.

  • 0 in reply to cu

    When I erase the chip.

    I think it failed when erasing the range 0x010A150 + 32Byte.

    This range is 

  • 0 in reply to cu

    Can you connect with J-Link commander and read AWS register:

    >mem32 0x0100A164 1

  • 0 in reply to cu

    Hello,

    At the screenshot that you sent with Segger J-link to flash download, the process is stuck for long time or just 1-2 seconds?

    Also, on the J-Flash Lite V7.92c, do you see the same error  as your initial screenshot or something else?

  • 0 in reply to AL_Renesas

    Hello,

    > At the screenshot that you sent with Segger J-link to flash download, the process is stuck for long time or just 1-2 seconds? 

      The process is stuck for just 1-2 seconds.

    > On the J-Flash Lite V7.92c, do you see the same error as your initial screenshot or something else?

      I see the same error.

    Thank you

  • 0 in reply to AL_Renesas

    Hello Al_Renesas,

    It doesn't work Disappointed.

    After running the script, I tried to erase it but was unsuccessful.

    Regards.

  • 0 in reply to cu

    The log after I run the script.

    J-Link Command File read successfully.
    Processing script file...
    J-Link>Device R7FA6M3AH
    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link OB-S124 compiled Jun 20 2023 17:09:11
    Hardware version: V1.00
    J-Link uptime (since boot): 0d 00h 00m 15s
    S/N: 831334275
    USB speed mode: Full speed (12 MBit/s)
    VTref=3.300V
    J-Link>si SWD
    Selecting SWD as current target interface.
    J-Link>speed 4000
    Selecting 4000 kHz as target interface speed
    J-Link>connect
    Device "R7FA6M3AH" selected.


    Connecting to target via SWD
    InitTarget() start
    Identifying target device...
    SWD selected. Executing JTAG -> SWD switching sequence...
    Initializing DAP...
    DAP initialized successfully.
    Low power mode detected. Waking device from low power mode.
    InitTarget() end - Took 12.0ms
    Found SW-DP with ID 0x5BA02477
    DPIDR: 0x5BA02477
    CoreSight SoC-400 or earlier
    Scanning AP map to find all available APs
    AP[2]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    AP[1]: APB-AP (IDR: 0x44770002)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
    [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
    [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
    [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
    [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
    [0][5]: E0041000 CID B105900D PID 000BB925 ETM
    [0][6]: E0042000 CID B105900D PID 002BB908 CSTF
    [0][7]: E0043000 CID B105900D PID 001BB961 TMC
    [0][8]: E0044000 CID B105F00D PID 001BB101 TSG
    Memory zones:
    Zone: "Default" Description: Default access mode
    Cortex-M4 identified.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    J-Link>w2 0x4001E3FE, 0xA501
    Writing A501 -> 4001E3FE
    J-Link>w4 0x4001E020, 0x00000000
    Writing 00000000 -> 4001E020
    J-Link>mem32 0x4001E020, 1
    4001E020 = 00000000
    J-Link>sleep 10
    Sleep(10)
    J-Link>w2 0x407FE0E4, 0x1E02
    Writing 1E02 -> 407FE0E4
    J-Link>w1 0x4001E416, 0x01
    Writing 01 -> 4001E416
    J-Link>w2 0x407FE084, 0xAA01
    Writing AA01 -> 407FE084
    J-Link>w4 0x407FE030, 0x0000A160
    Writing 0000A160 -> 407FE030
    J-Link>w1 0x407E0000, 0x40
    Writing 40 -> 407E0000
    J-Link>w1 0x407E0000, 0x08
    Writing 08 -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w1 0x407E0000, 0xD0
    Writing D0 -> 407E0000
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>sleep 1000
    Sleep(1000)
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>w2 0x407FE084, 0xAA00
    Writing AA00 -> 407FE084
    J-Link>mem32 0x0010A160,16
    0010A160 = 000000F0 C0FF0800 FFFFFF00 FFFFFF0B
    0010A170 = 0F50FFFF BBBBEBFF FF0F30BB 000000B0
    0010A180 = B0FF0F00 00000000 00B0FF0F 0F000000
    0010A190 = 0000B0FF FF0F0000 000000B0 B0FF0F00
    0010A1A0 = 00000000 FFFFFF0F 0F0040FA FFCFFFFF
    0010A1B0 = 770500F8 FFCF0261
    J-Link>* Reset the device */
    Unknown command. '?' for help.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    J-Link>sleep 10
    Sleep(10)
    J-Link>w2 0x407FE0E4, 0x1E08
    Writing 1E08 -> 407FE0E4
    J-Link>w1 0x4001E416, 0x01
    Writing 01 -> 4001E416
    J-Link>w2 0x407FE084, 0xAA01
    Writing AA01 -> 407FE084
    J-Link>w4 0x407FE030, 0x00000000
    Writing 00000000 -> 407FE030
    J-Link>w1 0x407E0000, 0x20
    Writing 20 -> 407E0000
    J-Link>w1 0x407E0000, 0xD0
    Writing D0 -> 407E0000
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>sleep 1000
    Sleep(1000)
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>w2 0x407FE084, 0xAA00
    Writing AA00 -> 407FE084
    J-Link>mem32 0x00000000,16
    00000000 = EA412100 F44F6210 EA01417F 43112110
    00000010 = 027FF44F 2200EA02 EA42430A 47706000
    00000020 = 68114AAA 2801B110 E006D002 E0006850
    00000030 = 07C06C10 F041D001 F0410110 6C500108
    00000040 = D5FC0480 05C06890 6011D5FC 489F4770
    00000050 = 4A9F6801 60014011
    J-Link>* Reset the device */
    Unknown command. '?' for help.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.

    Script processing completed.

    Type "connect" to establish a target connection, '?' for help
    J-Link>

  • 0 in reply to AL_Renesas

    Hi, I have the same problem, I used the EK-RA6M3G suddenly can not erase the chip, I tried the above two scripts are invalid, what other way