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Could not erase chip RA6M3G

cu

Hello, @supporter.

I am working on an RA6M3G device.

I tried to erase the chip using J-Flash Lite V7.92c but was unsuccessful.

I used Jlink Commander V7.92c but still failed.

Here log: 

Fullscreen log.txt Download 
SEGGER J-Link Commander V7.92c (Compiled Aug 30 2023 15:00:03)
DLL version V7.92c, compiled Aug 30 2023 14:58:23

Connecting to J-Link via USB...O.K.
Firmware: J-Link OB-S124 compiled Jun 20 2023 17:09:11
Hardware version: V1.00
J-Link uptime (since boot): 0d 00h 06m 55s
S/N: 831334275
USB speed mode: Full speed (12 MBit/s)
VTref=3.300V


Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. <Default>: R7FA6M3AH
Type '?' for selection dialog
Device>
Please specify target interface:
  J) JTAG (Default)
  S) SWD
  T) cJTAG
TIF>S
Specify target interface speed [kHz]. <Default>: 4000 kHz
Speed>
Device "R7FA6M3AH" selected.


Connecting to target via SWD
InitTarget() start
Identifying target device...
SWD selected. Executing JTAG -> SWD switching sequence...
Initializing DAP...
DAP initialized successfully.
InitTarget() end - Took 11.2ms
Found SW-DP with ID 0x5BA02477
DPIDR: 0x5BA02477
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[2]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
AP[1]: APB-AP (IDR: 0x44770002)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[0][1]: E0001000 CID B105E00D PID 003BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 003BB001 ITM
[0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
[0][5]: E0041000 CID B105900D PID 000BB925 ETM
[0][6]: E0042000 CID B105900D PID 002BB908 CSTF
[0][7]: E0043000 CID B105900D PID 001BB961 TMC
[0][8]: E0044000 CID B105F00D PID 001BB101 TSG
Memory zones:
  Zone: "Default" Description: Default access mode
Cortex-M4 identified.
J-Link>erase
No address range specified, 'Erase Chip' will be executed
'erase': Performing implicit reset & halt of MCU.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
T-bit of XPSR is 0 but should be 1. Changed to 1.
T-bit of XPSR is 0 but should be 1. Changed to 1.
Erasing device...
J-Link: Flash download: Only internal flash banks will be erased.
To enable erasing of other flash banks like QSPI or CFI, it needs to be enabled via "exec EnableEraseAllFlashBanks"

****** Error: Timeout while erasing sectors, RAMCode did not respond in time (PC = 0x1FFE040A, XPSR = 0x41000000, SP = 0x1FFE08C0)!
Failed to erase sectors.

J-Link: Flash download: Total time needed: 10.220s (Prepare: 0.161s, Compare: 0.000s, Erase: 10.006s, Program: 0.000s, Verify: 0.000s, Restore: 0.052s)
ERROR: Erase returned with error code -5.
J-Link>

Could you please help me check it and give me the solution?

Thank you.

  • 0 in reply to cu

    Hello,

    At the screenshot that you sent with Segger J-link to flash download, the process is stuck for long time or just 1-2 seconds?

    Also, on the J-Flash Lite V7.92c, do you see the same error  as your initial screenshot or something else?

  • 0 in reply to AL_Renesas

    Hello,

    > At the screenshot that you sent with Segger J-link to flash download, the process is stuck for long time or just 1-2 seconds? 

      The process is stuck for just 1-2 seconds.

    > On the J-Flash Lite V7.92c, do you see the same error as your initial screenshot or something else?

      I see the same error.

    Thank you

  • 0 in reply to AL_Renesas

    Hello Al_Renesas,

    It doesn't work Disappointed.

    After running the script, I tried to erase it but was unsuccessful.

    Regards.

  • 0 in reply to cu

    The log after I run the script.

    J-Link Command File read successfully.
    Processing script file...
    J-Link>Device R7FA6M3AH
    J-Link connection not established yet but required for command.
    Connecting to J-Link via USB...O.K.
    Firmware: J-Link OB-S124 compiled Jun 20 2023 17:09:11
    Hardware version: V1.00
    J-Link uptime (since boot): 0d 00h 00m 15s
    S/N: 831334275
    USB speed mode: Full speed (12 MBit/s)
    VTref=3.300V
    J-Link>si SWD
    Selecting SWD as current target interface.
    J-Link>speed 4000
    Selecting 4000 kHz as target interface speed
    J-Link>connect
    Device "R7FA6M3AH" selected.


    Connecting to target via SWD
    InitTarget() start
    Identifying target device...
    SWD selected. Executing JTAG -> SWD switching sequence...
    Initializing DAP...
    DAP initialized successfully.
    Low power mode detected. Waking device from low power mode.
    InitTarget() end - Took 12.0ms
    Found SW-DP with ID 0x5BA02477
    DPIDR: 0x5BA02477
    CoreSight SoC-400 or earlier
    Scanning AP map to find all available APs
    AP[2]: Stopped AP scan as end of AP map has been reached
    AP[0]: AHB-AP (IDR: 0x24770011)
    AP[1]: APB-AP (IDR: 0x44770002)
    Iterating through AP map to find AHB-AP to use
    AP[0]: Core found
    AP[0]: AHB-AP ROM base: 0xE00FF000
    CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
    Found Cortex-M4 r0p1, Little endian.
    FPUnit: 6 code (BP) slots and 2 literal slots
    CoreSight components:
    ROMTbl[0] @ E00FF000
    [0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
    [0][1]: E0001000 CID B105E00D PID 003BB002 DWT
    [0][2]: E0002000 CID B105E00D PID 002BB003 FPB
    [0][3]: E0000000 CID B105E00D PID 003BB001 ITM
    [0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
    [0][5]: E0041000 CID B105900D PID 000BB925 ETM
    [0][6]: E0042000 CID B105900D PID 002BB908 CSTF
    [0][7]: E0043000 CID B105900D PID 001BB961 TMC
    [0][8]: E0044000 CID B105F00D PID 001BB101 TSG
    Memory zones:
    Zone: "Default" Description: Default access mode
    Cortex-M4 identified.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    J-Link>w2 0x4001E3FE, 0xA501
    Writing A501 -> 4001E3FE
    J-Link>w4 0x4001E020, 0x00000000
    Writing 00000000 -> 4001E020
    J-Link>mem32 0x4001E020, 1
    4001E020 = 00000000
    J-Link>sleep 10
    Sleep(10)
    J-Link>w2 0x407FE0E4, 0x1E02
    Writing 1E02 -> 407FE0E4
    J-Link>w1 0x4001E416, 0x01
    Writing 01 -> 4001E416
    J-Link>w2 0x407FE084, 0xAA01
    Writing AA01 -> 407FE084
    J-Link>w4 0x407FE030, 0x0000A160
    Writing 0000A160 -> 407FE030
    J-Link>w1 0x407E0000, 0x40
    Writing 40 -> 407E0000
    J-Link>w1 0x407E0000, 0x08
    Writing 08 -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w2 0x407E0000, 0xffff
    Writing FFFF -> 407E0000
    J-Link>w1 0x407E0000, 0xD0
    Writing D0 -> 407E0000
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>sleep 1000
    Sleep(1000)
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>w2 0x407FE084, 0xAA00
    Writing AA00 -> 407FE084
    J-Link>mem32 0x0010A160,16
    0010A160 = 000000F0 C0FF0800 FFFFFF00 FFFFFF0B
    0010A170 = 0F50FFFF BBBBEBFF FF0F30BB 000000B0
    0010A180 = B0FF0F00 00000000 00B0FF0F 0F000000
    0010A190 = 0000B0FF FF0F0000 000000B0 B0FF0F00
    0010A1A0 = 00000000 FFFFFF0F 0F0040FA FFCFFFFF
    0010A1B0 = 770500F8 FFCF0261
    J-Link>* Reset the device */
    Unknown command. '?' for help.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.
    J-Link>sleep 10
    Sleep(10)
    J-Link>w2 0x407FE0E4, 0x1E08
    Writing 1E08 -> 407FE0E4
    J-Link>w1 0x4001E416, 0x01
    Writing 01 -> 4001E416
    J-Link>w2 0x407FE084, 0xAA01
    Writing AA01 -> 407FE084
    J-Link>w4 0x407FE030, 0x00000000
    Writing 00000000 -> 407FE030
    J-Link>w1 0x407E0000, 0x20
    Writing 20 -> 407E0000
    J-Link>w1 0x407E0000, 0xD0
    Writing D0 -> 407E0000
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>sleep 1000
    Sleep(1000)
    J-Link>mem32 0x407FE080, 1
    407FE080 = 00000000
    J-Link>w2 0x407FE084, 0xAA00
    Writing AA00 -> 407FE084
    J-Link>mem32 0x00000000,16
    00000000 = EA412100 F44F6210 EA01417F 43112110
    00000010 = 027FF44F 2200EA02 EA42430A 47706000
    00000020 = 68114AAA 2801B110 E006D002 E0006850
    00000030 = 07C06C10 F041D001 F0410110 6C500108
    00000040 = D5FC0480 05C06890 6011D5FC 489F4770
    00000050 = 4A9F6801 60014011
    J-Link>* Reset the device */
    Unknown command. '?' for help.
    J-Link>r
    Reset delay: 0 ms
    Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
    Reset: Halt core after reset via DEMCR.VC_CORERESET.
    Reset: Reset device via AIRCR.SYSRESETREQ.
    T-bit of XPSR is 0 but should be 1. Changed to 1.

    Script processing completed.

    Type "connect" to establish a target connection, '?' for help
    J-Link>

  • 0 in reply to AL_Renesas

    Hi, I have the same problem, I used the EK-RA6M3G suddenly can not erase the chip, I tried the above two scripts are invalid, what other way

  • 0 in reply to cu

    this script resolved the issue I had as cu mentioned initially
    I am able to recover my RA6M3 EK board