Duty cycle inverts after 0% and 100% setting

Dear Renesas team,

I have an issue with an symmetric pwm mode:

I set the duty cycle it from 0% to 5% to 100% to 5% and so on like that:

while(1)

{

R_GPT_DutyCycleSet(g_timer0.p_ctrl, 0, GPT_IO_PIN_GTIOCA); // 0% duty cycle

// Wait some time

R_GPT_DutyCycleSet(g_timer0.p_ctrl, 1200, GPT_IO_PIN_GTIOCA); // 5% duty cycle

// Wait some time

R_GPT_DutyCycleSet(g_timer0.p_ctrl, 24000, GPT_IO_PIN_GTIOCA); // 100% duty cycle

// wait some time

R_GPT_DutyCycleSet(g_timer0.p_ctrl, 1200, GPT_IO_PIN_GTIOCA); // 5% duty cycle

// Wait some time

}

The problem is the switch from 0% to 5% results in 5% ... but the switch from 100% to 5% results in 95% ... so actually the inverse.

I added an example for the RA2E1 EVK that you can see thatTest_PWM.zip

You can measure the PWN here on P103. You see there 0% duty cycle for 5sec, then 5% duty cycle for 5 secs,, then 100% duty cycle for 5 secs and the 95% for 5 secs

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