RA2L1 Low Power Mode Enter and Exit Logic

I am beginning LPM with RA2L1 processors and want to better understand enter and exit mechanism.

In my project, I need to enter LPM - Software Standby under some conditions. Once in LPM, the processor should wake up after an interval (t), take ADC reading and make some comparison, lets say A>B. If true, it should return to Normal mode, else go back to LPM.

The LPM entry will be called in a function myFunc() which itself will be called in an ISR, (ISR1). A timer will be started before entering LPM and it's interrupt ISR2 will be used to wake up the processor. The code logic is given below

ISR1()

{

     myFunc()

}

myFunc()

{

    // Configure peripherals for LPM

    // Start timer

    // Enter LPM

   // Program starts here on wake up and after ISR2 is executed

   // Read ADC

   // if(A>B == False) myFunc()    //Re-enter LPM

}

ISR2()

{

}

How can I implement this? As per my understanding, the processor stops at //Enter LPM line. When a timer interrupt occurs, ISR2() will be called and executed and once ISR2 is executed, program will return to next line after //Enter LPM.

Ques 1.) Is this correct?

Ques 2.) What happens if ISR2 priority is less than that of ISR1? Will the processor still wake up?

Ques 3.) If (A>B) is not true, is the code logic above the correct way to do it or is there a better mechanism proposed by Renesas?

Kindly help with your feedback so that I can expedite my development.