Hi , i am really new and not familiar with e2 studio i have a project which I just want to build it and upload it on my board I seem to get some persistent error which doesn't seem to go away I checked the include path and the specific folder where those files are were already included here is the full error log : (
Building file: ../ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.c
Building file: ../ra/fsp/src/bsp/mcu/all/bsp_security.c
Building file: ../ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c
Building file: E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/debug.c
Building file: E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c: In function 'bsp_prv_clock_set_hard_reset':
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:144:52: error: 'BSP_CFG_ICLK_DIV' undeclared (first use in this function)
Building file: E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Platform/Renesas_RA4M2/usb/usb_sci.c
144 | #define BSP_PRV_STARTUP_SCKDIVCR_ICLK_BITS ((BSP_CFG_ICLK_DIV & 0xFU) << 24U)
| ^~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:184:51: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR_ICLK_BITS'
184 | #define BSP_PRV_STARTUP_SCKDIVCR (BSP_PRV_STARTUP_SCKDIVCR_ICLK_BITS | \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1056:26: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR'
1056 | R_SYSTEM->SCKDIVCR = BSP_PRV_STARTUP_SCKDIVCR;
| ^~~~~~~~~~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:144:52: note: each undeclared identifier is reported only once for each function it appears in
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:151:51: error: 'BSP_CFG_PCLKD_DIV' undeclared (first use in this function)
151 | #define BSP_PRV_STARTUP_SCKDIVCR_PCLKD_BITS (BSP_CFG_PCLKD_DIV & 0xFU)
| ^~~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:186:51: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR_PCLKD_BITS'
186 | BSP_PRV_STARTUP_SCKDIVCR_PCLKD_BITS | \
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:156:52: error: 'BSP_CFG_PCLKC_DIV' undeclared (first use in this function)
156 | #define BSP_PRV_STARTUP_SCKDIVCR_PCLKC_BITS ((BSP_CFG_PCLKC_DIV & 0xFU) << 4U)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:187:51: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR_PCLKC_BITS'
187 | BSP_PRV_STARTUP_SCKDIVCR_PCLKC_BITS | \
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:161:52: error: 'BSP_CFG_PCLKB_DIV' undeclared (first use in this function)
161 | #define BSP_PRV_STARTUP_SCKDIVCR_PCLKB_BITS ((BSP_CFG_PCLKB_DIV & 0xFU) << 8U)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:188:51: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR_PCLKB_BITS'
188 | BSP_PRV_STARTUP_SCKDIVCR_PCLKB_BITS | \
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:166:52: error: 'BSP_CFG_PCLKA_DIV' undeclared (first use in this function)
166 | #define BSP_PRV_STARTUP_SCKDIVCR_PCLKA_BITS ((BSP_CFG_PCLKA_DIV & 0xFU) << 12U)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:189:51: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR_PCLKA_BITS'
189 | BSP_PRV_STARTUP_SCKDIVCR_PCLKA_BITS | \
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:180:52: error: 'BSP_CFG_FCLK_DIV' undeclared (first use in this function)
180 | #define BSP_PRV_STARTUP_SCKDIVCR_FCLK_BITS ((BSP_CFG_FCLK_DIV & 0xFU) << 28U)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:191:51: note: in expansion of macro 'BSP_PRV_STARTUP_SCKDIVCR_FCLK_BITS'
191 | BSP_PRV_STARTUP_SCKDIVCR_FCLK_BITS)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1061:24: error: 'BSP_CFG_CLOCK_SOURCE' undeclared (first use in this function); did you mean 'BSP_CFG_CLOCKS_SECURE'?
1061 | R_SYSTEM->SCKSCR = BSP_CFG_CLOCK_SOURCE;
| ^~~~~~~~~~~~~~~~~~~~
| BSP_CFG_CLOCKS_SECURE
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c: In function 'bsp_clock_freq_var_init':
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1152:49: error: 'BSP_CFG_XTAL_HZ' undeclared (first use in this function)
1152 | g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_PLL] = BSP_CFG_XTAL_HZ;
| ^~~~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: In function 'get_sign':
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:178:30: warning: conversion from 'double_uint_t' {aka 'long long unsigned int'} to 'int' may change value [-Wconversion]
178 | return get_bit_access(x).U >> (DOUBLE_SIZE_IN_BITS - 1);
| ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: In function 'get_components':
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:431:34: warning: conversion from 'int_fast64_t' {aka 'long long int'} to 'double' may change value [-Wconversion]
431 | double remainder = (abs_number - number_.integral) * powers_of_10[precision];
| ^
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:444:22: warning: comparing floating-point with '==' or '!=' is unsafe [-Wfloat-equal]
444 | else if (remainder == 0.5) {
| ^~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: At top level:
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:467:8: warning: no previous declaration for 'apply_scaling' [-Wmissing-declarations]
467 | double apply_scaling(double num, struct scaling_factor normalization)
| ^~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:472:8: warning: no previous declaration for 'unapply_scaling' [-Wmissing-declarations]
472 | double unapply_scaling(double normalized, struct scaling_factor normalization)
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:477:23: warning: no previous declaration for 'update_normalization' [-Wmissing-declarations]
477 | struct scaling_factor update_normalization(struct scaling_factor sf, double extra_multiplicative_factor)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1165:64: error: 'BSP_CFG_PLL_SOURCE' undeclared (first use in this function); did you mean 'BSP_CFG_FLL_ENABLE'?
1165 | g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_PLL] = ((g_clock_freq[BSP_CFG_PLL_SOURCE] * (BSP_CFG_PLL_MUL + 1U)) >> 1U) /
| ^~~~~~~~~~~~~~~~~~
| BSP_CFG_FLL_ENABLE
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1165:87: error: 'BSP_CFG_PLL_MUL' undeclared (first use in this function); did you mean 'BSP_CLOCKS_PLL_MUL'?
| BSP_CLOCKS_PLL_MUL
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: In function 'sprint_floating_point':
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:768:13: warning: comparing floating-point with '==' or '!=' is unsafe [-Wfloat-equal]
768 | if (value != value)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1166:50: error: 'BSP_CFG_PLL_DIV' undeclared (first use in this function)
1166 | (BSP_CFG_PLL_DIV + 1U);
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: In function 'get_bit_access':
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:168:38: warning: function returns an aggregate [-Waggregate-return]
168 | static inline double_with_bit_access get_bit_access(double x)
| ^~~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:178:10: warning: function call has aggregate value [-Waggregate-return]
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:425:33: warning: function returns an aggregate [-Waggregate-return]
425 | static struct double_components get_components(double number, unsigned int precision)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1182:65: error: 'BSP_CFG_PLL2_SOURCE' undeclared (first use in this function)
1182 | g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_PLL2] = ((g_clock_freq[BSP_CFG_PLL2_SOURCE] * (BSP_CFG_PLL2_MUL + 1U)) >> 1U) /
| ^~~~~~~~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: In function 'update_normalization':
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:477:23: warning: function returns an aggregate [-Waggregate-return]
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:485:23: warning: function call has aggregate value [-Waggregate-return]
485 | int factor_exp2 = get_exp2(get_bit_access(sf.raw_factor));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:486:29: warning: function call has aggregate value [-Waggregate-return]
486 | int extra_factor_exp2 = get_exp2(get_bit_access(extra_multiplicative_factor));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c: In function 'sprint_decimal_number':
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1182:89: error: 'BSP_CFG_PLL2_MUL' undeclared (first use in this function); did you mean 'BSP_CLOCKS_PLL_MUL'?
E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Utility/printf/printf.c:629:37: warning: function call has aggregate value [-Waggregate-return]
629 | struct double_components value_ = get_components(number, precision);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1183:51: error: 'BSP_CFG_PLL2_DIV' undeclared (first use in this function)
1183 | (BSP_CFG_PLL2_DIV + 1U);
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c: In function 'bsp_clock_init':
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:323:57: error: 'BSP_CFG_PLL2_MUL' undeclared (first use in this function); did you mean 'BSP_CLOCKS_PLL_MUL'?
323 | #define BSP_PRV_PLL2CCR ((BSP_CFG_PLL2_MUL << R_SYSTEM_PLL2CCR_PLL2MUL_Pos) | \
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1400:25: note: in expansion of macro 'BSP_PRV_PLL2CCR'
1400 | R_SYSTEM->PLL2CCR = BSP_PRV_PLL2CCR;
../ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c:34:18: error: 'BSP_CFG_HOCO_FREQUENCY' undeclared here (not in a function)
34 | ((uint32_t) BSP_CFG_HOCO_FREQUENCY << BSP_FEATURE_BSP_OFS1_HOCOFRQ_OFFSET))
| ^~~~~~~~~~~~~~~~~~~~~~
../ra/fsp/src/bsp/mcu/all/bsp_rom_registers.c:182:5: note: in expansion of macro 'BSP_ROM_REG_OFS1_SETTING'
182 | BSP_ROM_REG_OFS1_SETTING;
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:324:57: error: 'BSP_CFG_PLL2_DIV' undeclared (first use in this function)
324 | (BSP_CFG_PLL2_DIV << R_SYSTEM_PLL2CCR_PL2IDIV_Pos) | \
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:232:56: error: 'BSP_CFG_PLL_MUL' undeclared (first use in this function); did you mean 'BSP_CLOCKS_PLL_MUL'?
232 | #define BSP_PRV_PLLCCR ((((BSP_CFG_PLL_MUL & BSP_PRV_PLLCCR_PLLMUL_MASK) << \
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1414:35: note: in expansion of macro 'BSP_PRV_PLLCCR'
1414 | R_SYSTEM->PLLCCR = (uint16_t) BSP_PRV_PLLCCR;
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:235:53: error: 'BSP_CFG_PLL_DIV' undeclared (first use in this function)
235 | BSP_CFG_PLL_DIV)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1517:21: error: 'BSP_CFG_CLKOUT_SOURCE' undeclared (first use in this function); did you mean 'BSP_CFG_CLOCKS_SECURE'?
1517 | uint8_t ckocr = BSP_CFG_CLKOUT_SOURCE | (BSP_CFG_CLKOUT_DIV << BSP_PRV_CKOCR_CKODIV_BIT);
| ^~~~~~~~~~~~~~~~~~~~~
make: *** [ra/fsp/src/bsp/mcu/all/subdir.mk:54: ra/fsp/src/bsp/mcu/all/bsp_rom_registers.o] Error 1
make: *** Waiting for unfinished jobs....
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1517:46: error: 'BSP_CFG_CLKOUT_DIV' undeclared (first use in this function)
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1541:28: error: 'BSP_PRV_UCK_DIV' undeclared (first use in this function); did you mean 'BSP_PRV_MODRV'?
1541 | R_SYSTEM->USBCKDIVCR = BSP_PRV_UCK_DIV;
| BSP_PRV_MODRV
Building file: E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Platform/Renesas_RA4M2/driver/flash.c
../ra/fsp/src/bsp/mcu/all/bsp_clocks.c:1544:25: error: 'BSP_CFG_UCK_SOURCE' undeclared (first use in this function); did you mean 'BSP_CFG_CLOCKS_SECURE'?
1544 | R_SYSTEM->USBCKCR = BSP_CFG_UCK_SOURCE | R_SYSTEM_USBCKCR_USBCKSREQ_Msk;
Building file: E:/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/AFBR-S50-API-421a55e2f9022c3b6d209047d5a18926a16773c8/Sources/Platform/Renesas_RA4M2/driver/bsp.c
make: *** [ra/fsp/src/bsp/mcu/all/subdir.mk:54: ra/fsp/src/bsp/mcu/all/bsp_clocks.o] Error 1
"make -r -j16 all" terminated with exit code 2. Build might be incomplete.
11:06:40 Build Failed. 26 errors, 14 warnings. (took 2s.796ms)
) since there isn't a lot of users and documentation so it's hard to find solution for this online so if you could point out the issue it would be great. think it is something trivial but since I am not used to this ide so I can't really pinpoint
Hello,
This is possibly because the project you imported was made on a different FSP version than the one you have installed on e2studio.
Have you generated a new project content from FSP Configurator ? Click on 'Generate Project Content' and build again.