Hi,
I’m currently working with the RA6M5 MCU, and there has been a recent hardware modification to add an external crystal. This change needs to be supported in the firmware.
After loading the firmware onto the board, the system does not function as expected. Upon debugging, I observed that the code is stuck at:
void bsp_clock_init (void) { . . . FSP_HARDWARE_REGISTER_WAIT(R_SYSTEM->OSCSF_b.MOSCSF, 1U); . . . }
Could you please help identify what might be going wrong?
Thanks!
Hello,
Which was the hardware modification ?
This is a sub-clock oscillator, not main clock oscillator (XTAL):
Is there a main clock oscillator connected to the device ?
Make sure the oscillator pins are enabled on the pin configurations:
Hi AZ,
Thanks for the information.
Here's the old design:
There is nothing connected to XTAL:
So there is no main clock oscillator connected. Then this option should be set as 'Not Populated' because there is no main clock oscillator.
Note. I would also recommend to update the FSP version.
Thanks AZ.
I tried the solution. It doesn't work. The internal clock was used in our project. For this new added crystal, how should I use it? From the clock configuration, I only see the HOCO and XTAL options from "PLL Src:". Here is the existing clock configuration:
Is there a main clock oscillator connected on your current design ?
The reason we added the external 32768Hz crystal is to improve the RTC accuracy.
We'll change the RTC source to use RTC_CLOCK_SOURCE_SUBCLK. Other than that, should we also change the Clock confiugration in the Smart Configurator?
Thanks.
Ok, but I am asking about the existence of main clock oscillator - not sub-clock oscillator.
If there is not a main clock oscillator connected to P212, P213 pins then this should be set to 'Not Populated':
Yes, I set the "Main Oscillator Populated" as "Not Populated". It didn't work. The firmware was stuck at "FSP_HARDWARE_REGISTER_WAIT(R_SYSTEM->OSCSF_b.MOSCSF, 1U);".
How have you configured the CGC pins ?
Make sure you Generate Project Content, build and then debug after every change on FSP Configurator.
Thanks for the info!
I had the the CGC configuration as follow:
However, after the project content was generated, I don't see the P212 and P213 in the pin cfg data:
const ioport_pin_cfg_t g_bsp_pin_cfg_data[] = { { .pin = BSP_IO_PORT_00_PIN_00, .pin_cfg = ((uint32_t) IOPORT_CFG_ANALOG_ENABLE) }, { .pin = BSP_IO_PORT_00_PIN_01, .pin_cfg = ((uint32_t) IOPORT_CFG_ANALOG_ENABLE) }, { .pin = BSP_IO_PORT_00_PIN_02...
As there is no XTAL/EXTAL in our design, I thought maybe I should choose "Sub Osc"
After the project content is generated, there is no any PIN for XCIN or XCOUT.
I suppose the "Clock Source" for the RTC should be "Sub-Clock"
Other than that, is there anything else I should configure?
Basically, my question is, there is a new hardware change. That is, an external 32768Hz crystal is connected to XCIN/XCOUT. What are the necessary steps to take in order to utilize this crystal for RTC?