Hi,
I am working on project with RL78/G13 with E2 studio and KPIT GNU Compiler.
Some times system resets due execution of TRAP instruction.
Any one have idea about why this happens.
Also, please make sure the RL78 CPU is being held in reset until VDD =/> minimum rated voltage, which depends on the CPU Mode and Speed you have set in Option byte 000C2H. Sometimes if CPU is allowed to start with VDD too low, code execution can fail and fetch out-of-order instruction, like 0xFF opcode which is erased Code flash value, so TRAP results.
RL78 Voltage range limits:
The easiest way to keep the RL78 CPU in reset is to turn on the LVD RESET mode in Option Byte 000C1H. For example, if the Option byte 000C2H is set to 0xE8 (High Speed Mode, 32MHZ), then you must hold CPU in reset until VDD = 2.7Volt or higher.
For LVD RESET setting to hold CPU in RESET until VDD = 2.7V, use 000C1H = 0x7F (VLVD5: reset on VDD = 2.75V falling edge) or higher setting than 2.75V
Regards,
Mike
Reset by TRAP means it is a software crash in your application. Cause is illegal instruction execution.
Every function call is a jump instruction.
The easiest way to get illegal instruction execution is to use a "normal" function (means a function that does not use __attribute__ ((interrupt)) ) as interrupt function. In this case the interrupt function exit uses the wrong instruction, the stack is not read correctly, the return address is not found and the processor jumps to a wrong address.