I am using RL78/f13.
Using Lin communication, trying to sense the status of the switch (slave) and RL78 (master).
Error detection register has been enabled (LEDE0 = 0x8F) .
When header is transmitted continuously with adequate delay and slave is also responding, but when break point is placed at status interrupt, it enters and showing bit error and physical bus error (LEST0=0x03). It is entering status interrupt at every 131 count of header transmission.
How to rectify these errors?
I'm a little confused by your question, so let me know if I'm understanding the problem correctly. In your LIN communication module, you have the error detection register enabled. When you do NOT have a break point placed at the status interrupt, everything runs fine. But once you do add a break point at that spot, it generates an error interrupt every 131 transmissions?
Am I understanding that correctly? Your clarification will help me and others in the forum understand so we can help you troubleshoot, thank you!
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Yes, you have understood it correctly.
It sounds like the breakpoint occurring at that interrupt point is throwing off your timing, as LIN are not externally clocked. Yet the fact that it creates an error interrupt exactly every 131 transmissions is odd and must be indicative of something. Could you confirm that it is consistently every 131 transmissions?