Hello Renesas,
Currently, we use RL78 F24 for our application.
We have a concern about the program counter during the reset due to low voltage detection.
We configure voltage detector in reset mode.
I wonder to know when the program counter is set to the contents of the reset vector table when VDD is equal to VLVD and VDD is rising? (Please check the below image)
Is the program counter set in the red circles?
Thank you very much.
Hello,
No matter what the reset cause was, the reset signal generation sets the reset vector table values at addresses 0000H and 0001H to the 16 lower-order bits of the program counter. The four higher-order bits of the program counter are cleared to 0000.
So the program counter is set to its initial value when the reset signal is generated (before the red circle).
Thank for your fast response.
During the whole process A -> B -> C -> D (please check the below image), the program counter is only set the value of the reset vector table once time?
The program counter is set with this value during reset state, so from B until C.
Is there any possibility that the user initialisation code (low_level_init) is called 2 times during the process from A to D?
From A to D (or more accurately from B to C) the device is on reset state and no code is executed. After C the the initialization takes place.