RX63N download with RFP


I am using RX63N + E1 emulator + RFP V2.05 + CS+ and sw is dividing boot and application.

Boot use 0xFF7FC000 ~ 0xFF800000,  application use 0xFFF000 ~ 0xFFFFFFFF

Boot and application has each project. So mot files is made two(boot.mot, app.mot)

Boot and application has fixed vector table (FFFFFF80h to FFFFFFFFh).

for example,









E1 + RFP V2.05 didn't detect fixed vector's address overlapped. But RFP V3.0 above detect address overlapped and cannot download sw.

So I change boot's fixed vector address from 0xFFFFFF80 to 0xFF7FFFA0 and RFP V3.0 doesn't detect error and downloading is good.

As I know, fixed vector address is from 0xFFFFFF80 to 0xFFFFFFFF.

I have a question.

1. Can I change fixed vector address?

1) if right, could you share the document or sample code about this?

2) If wrong, could you tell me how do I fix this overlapped problem?

2. If two mot(boot.mot, app.mot) is merged, two mot's same address(boot's fixed vector address or app's ) has to be deleted. This is Am I right?

3. Does RFP V3.0 above has the ability to ignore overlapped problem?

4. In RFP setting, what is difference and advantage of using 'power target from the emulator' or not?

Thanks for your help in advance.

  • 1.)  The fixed vector table is FIXED.  However, there is the relocatable vector table that can be used.  Refer to the hardware user manual of the device for more information.

    2.)  The programming very much needs to flag the error of overlapping addresses when merging hex-files.  The tool should not decide which piece of the overlap should be programmed (as what is undoubtedly happening with the older version of RFP)

    3)  No, and it should not provide such an option (see #2 above)

    4)  The option of the debugger providing power is available for convenience when external power is not provided.  This works well with the simple reference boards that do not have many chip requiring power.  As the power available from the debugger is limited, a custom design that exceeds this limit will require external power to be supplied.

  • Boot sw has its fixed vector address and app sw has also.

    But fixed vector address has to be FFFFFF80h to FFFFFFFFh.

    If download with RFP V3.0x, boot or app's fixed vector address's data(for example,  .mot) has to be deleted or one's fixed vector address has to be changed.

    Could you help me to resolve this problem?

    In my opinion, the answer is fixed. 

    1) delete fixed address data of .mot or 2) change fixed vector address of boot or app

    But I need the confirm of Renesas or someone.

  • Hello dear JR, thank you for posting to the Renesas community and  sorry for the late response.

    I'll go through the issue and inform you about it.

    Thanks for your patience.

  • Hi,

    1) delete fixed vector address -> I think boot will crash when no app or app is broken.

    2) change boot's fixed vector address -> I think this doesn't make problem when no app(etc). But how can I test these condition(interrupt in fixed vector table is occurred)?

    I'm waiting for your reply.

  • Hello dear JR, I’m really sorry for the delay.

    I’ve gone through the issue and tried it on two different RX family MCU (RX231, 512KB ROM) and (RX66N, 4MB ROM) using CS+ IDE and CC-RX compiler, I’ve attached project files at the end of the message.

     Let’s dive deeper into the hardware user’s manual and see what happens when CPU starts

    As you’re familiar with branch operation and memory accessing, I try to explain it briefly (I hope I’m not exhausting you):

    -In RX63N, after a reset, CPU always branches to the address which resides in the “0xFFFFFFFC”   

    That’s why we call it fixed vector table, there’s no way to oblige the CPU to start off from any address other than 0xFFFFFFFC after a reset.

    *Keep in mind that’s a hardware constraint procedure, and we cannot compel CPU to change its RESET vector address, by changing sections addresses in compiler. (We can tell the compiler where we want to put the application and data within ROM, and where is the boundaries, but CPU decides to read the instructions from where)

    *If you change the OUTPUT setup in your compiler to generate “intel HEX file” and look at it with a ‘hex editor software’ you could clearly see the value in “0xFFFFFFFC” address is the address of “PResetPRG” section! so that CPU fetches the app’s start address from “0xFFFFFFFC”. Now you can imagine what will happen if the value in that address were empty! (CPU will branch to a unknow address and app will not run).

    My approach to run two individual apps on a RX device is:

           -I divide Program ROM (0xFFE00000-0xFFFFFFFF) into two sections

    Now in Application1:

           -I don’t modify ‘FIXEDVECT’ section (let it be 0x0FFFFFFD0), and just change the ‘PResetPRG’ section to a limited address in range of ROM capacity (!important! : the addresses must be a factor of 4)

           -after handling all needed in application1, when it comes to Jumping to the application2. I’ll use a branch instruction to the application2’s RESETVECTOR (Which is a offset of 0x0FFFFFFD0)!

           -extracting ‘.mot or .hex’ file for programming

    And in Application2:

           -I modify the FIXEDVECT address (offset the 0x0FFFFFFD0 according to the application1 area), and change the ‘PResetPRG’ to the ‘0xFFE00000’.

           -Write the code as a normal application!

           -extracting ‘.mot or .hex’ file for programming

    So and finally! We have no collision and RFP V3.0 will program two individual files successfully!

    Your concerns might be:

    • 1-What about Interrupts? What happens to interrupt ISRs after jumping to the app2?
    • 2-What about app2 fixed vector? What will happen if we change that section in ROM?
    • 3-What happens to non-maskable interrupts?

    According to my experiment here’s the answers:

           1-there’s a register in RX63N CPU which holds the address of the maskable interrupt table (INTB control register), as the reset value of that register is 0x0000000 by default, the application should take care of assigning a value to that register when initializing the hardware. 

    You should not be worried about this, the compiler takes care of that and produces the needed code according to the memory regions and ISR addresses. So even after Jumping to the app2 (Because of that we’ve changed the fixed vector table, and the boundaries of two apps are different) the INTB value will dynamically change after a reset and maskable interrupts (Like Timer OVF) won’t mess up with the app1’s ISRs.

         2-Although it’s vital to not change the app1’s fixed vector table area and we won’t be able to run the MCU if there’s no value in ‘0xFFFFFFFC’. But after booting up and running the app1, that won’t be a problem anymore, we’ll branch to the new fixed vector address of the app2, and that’s like we’ve swapped the app1 and app2 and performed a reset.

         3-I’m not sure if you’re concerned about those type of interrupts, but as those are named fixed, even when we’ve jumped into the app2, if the CPU throws a non-maskable interrupt, it will fetch the address of the ISRs in the app1! And that’s like we’re running app2, but app1’s ISR functions are running (ISRs dedicated to the non-maskable interrupts).

    In my opinion, that’s not a big deal, you can write the app1’s non-maskable ISR functions in a way that could handle errors in both apps (for example performing a reset!)

    Even though, in some other devices like ‘RX231’ and ‘RX66N’ there’s a control register just like INTB, which holds the address of exception vector table, and we can relocate it when jump to app2.

    Here's the link of project examples that I worked on, you can check those projects and see the way that I wrote the code for both apps.

    RX63N download with RFP issue.rar

    I’ve used two different LEDs, with different blink rates, which is connected to a timer interrupt, and used the same interrupt for both apps, so that assured me, there’s no conflict in ISRs after jumping to the second app.

    I hope I could provide you relevant information, don’t hesitate to ask for clarification or follow up question.

    Best regards. Hossein.

  • Thanks for your reply.

    But I cannot open above file with CS+.(Version problem? your project CS+ V8.10, my CS+ version V6.01)

    I have a question about below your comment.

    And in Application2:

           -I modify the FIXEDVECT address (offset the 0x0FFFFFFD0 according to the application1 area), and change the ‘PResetPRG’ to the ‘0xFFE00000’.

    1) I don't know how to modify the FIXEDVECT address.

    In RX66N_Dual_APP2.rcpe, I found EXCEPTVECT/FFFF7EFF, RESETVECT/FFFF7FFC. Is that modified address?

       (1) If yes, when app2 is running, if exception is happened, does program stop at above address?
       (2) If no, can you tell me modified address?
    2) In map file, PResetPRG's address is 0xffff8000 in app1 and 0xffff0000 in app2. not 0xFFE00000.
    3) In RX66N_Dual_APP1.mot, I think S309FFFFFFFC0080FFFF7F is something wrong. S309FFFFFFFC0008FFFF7F is right. Because 0xFFFF0800 is app2's area, I think 0xFFFF8000 is right.
    Thanks for your help.
  • Hi JR,

    I’m sorry for the problem with opening project files. I’m using the latest CS+ version. By the way, you can check the .c files as plain text. Also, I have placed some text notes in the example project’s directories which you might find useful. I have described it in detail (It addresses your questions).

    But note that the RX66N and RX231, which I used to test, have different memory layouts. You should take a look at each Family hardware user’s manual to understand the slight differences with RX63N.

    About changing the project memory section areas in CS+ using CC-RX compiler, here are the steps:

    You can determine the start address of the memory sections in your compiler. Then, the compiler will take care of the regions. *You might see a slightly different memory section layout if you’re not using Smart Configurator.

    I don’t know how you were configuring the section addresses earlier, but that's the proper way to do it.

    Regarding your questions:

    1. “In RX66N_Dual_APP2.rcpe, I found EXCEPTVECT/FFFF7EFF, RESETVECT/FFFF7FFC. Is that a modified address? If yes, when app2 is running, if an exception happens, does the program stop at the above address?”

      - Yes, that’s the modified address, and yes, RX66N supports relocatable exception vector table address. But that’s not the case in RX63N! In RX63N, when an exception happens, it always alludes to the app1 exception vector table and runs the code which is there (if it exists, and if not, stops).

    2. About the areas of the provided examples, I recommend you to check the datasheet of each device and create a test project on your own. PResetPRG section specifies the upper bound of the program memory, so take care of overlapping addresses in your project for your RX63N device. (You can leave a section of memory reserved between two apps if you’re afraid of overlapping sections.)

    3. I have no idea about .mot file. I recommend you to build a .hex file and investigate it using hex editors (I use NeoHexEditor).

    I hope I could explain it. Don’t hesitate to ask questions if needed.

    Best regards, Hossein.

    2) In map file, PResetPRG's address is 0xffff8000 in app1 and 0xffff0000 in app2. not 0xFFE00000.
  • Hi Hossein,

    In case of RX63N, fixed vector table must exist in one of two(app1 or app2) because RX63N does not support relocatable vector.

    If app2 has fixed vector table, app1 cannot have fixed vector table in RX63N.

    In this case, app1 run -> (not to jump to app2) -> exception is happened -> system down ?

    Am I right?

    Is it possible to avoid this situation?



  • Dear JR, you might want to look at it from a different point of view,  you mentioned "Fixed vector table must exist in one of two(app1 or app2)". compiler creates binary files according to the section configuration which we've specified in the compiler setting in each project, so that both apps will have its fixed vector areas. (But app2's fixed vector area cannot be used directly by CPU, due RX63N limitation, but is defined virtually by the compiler)

    after programming binary files, the app1 and app2 will occupy the memory in a determined way (the app 1 and app 2 are almost identical except the area which are placed in ROM. 

    We haven't changed the default vector table values of the app1 (we just limited the code section memory area of app1), thus the app1 will always run after each reset and will act like a normal application. the app1's behavior will be identical with a regular application. 

    but when it jumps to the app2 reset vector (which is somehow a virtual reset_vector), we'll have some problems with exception handling (if that's your concern). interrupt vector table will change dynamically after jumping to app2, but exception vector table won't be changed (in RX63N), and when an exception happens in app2 the CPU will refer to the exception vector of app1 (Although fixed vector table is specified virtually by compiler with an offset with app1's fixed vector table address).     

    Finally I recommend you not to be worried about exceptions in first stage, after setting up your application 

    you can dive deeper into the Rxv2 core user manual, and seek for instructions and exception handling in your application 

    Best regards, Hossein.

  • Dear Hossein,

    "Fixed vector table is defined virtually by the compiler"

    it means


    1) app1 without fixed vector table is downloaded, app2 is not downloaded

    2) exception is happened

    3) exception handling is working good. 

    Am I right?

    But when I download fw without fixed vector table and exception is happened, system is down.

    2. app1 with fixed vector table and app2 without fixed vector table

    1) app1 and app2 is downloaded

    2) app1 runs and jump to app2

    3) exception is happened

    4) at that time, if app1 has the fixed vector table, interrupt related exception will be invoked vitually. Am I right?

    I cannot find any manual about this. If you share the manuals that you mentioned, I'll investigate it.



  • Dear JR, sorry for the late, if the problem still exists, I'll be grateful if you share your codes for more investigation. 
    I'm not sure if there's a specific manual about that, but you can check the RXv1 core manual, here.
    Also, check the structure of RX63N memory and interrupt handling. Those are the implicit topics that come to my mind. 


    If this response, or one provided by another user, answers your question, please verify the answer. Thank you!

    Renesas Engineering Community Moderator

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