RX72 Is it possible to read the port status of the WR (P5.0) pin during writing on external bus

Im trying to read the status of the WR pin (P5.0) during writing on the external bus in order to determine the end of the WR signal.

while (PORT5.PIDR.BIT.B0==0)




Unfortunately it does not work.

Any ideas?

Best regards


  • Hello dear Martin, thank you for posting on the Renesas community.

    First of all, did you manage to monitor the signal on the pin? how about a transient signal which CPU couldn't catch? 
    by the way, the GPIO related to WE# pin has the below scheme


    Although the PMR and PDR registers cannot affect the reading value, I reckon there's some circuitry that can affect the tri-state buffer which is connected to the PIDR register. (Unfortunately, the exact internal circuitry isn't available in the user manual)

    If you're sure of the presence of the desired signal on the pin, check if the related ASEL bit of the pin is cleared. that's the only factor that can affect the reading of the pin that I can think of right now. 

    I hope it could help you, keep me posted about the result. 



    If this or any other user's response answers your concern, kindly verify the answer. Thank you!

    Renesas Engineering Community Moderator