rx66t Bootloader Xmodem

Hi,

I have an issue about "invalid start address". I try to transfer application code via teraTerm. At the end of the flow, the correct crc comparison is made, but there is no jump to the application.

TeraTerm Screen;

System BootLoader

Reset reason...
Cold Reset.

Enter 'U' for update in 5 seconds...
. . . . .

Device Firmware Update : Update not requested.
Device Firmware Update : Verifying Application area with CRC.
Invalid Start Address
Device Firmware : Calculated Checksum Value : 0x45E3
Device Firmware : Read Checksum Value : 0x45E3
Device Firmware : Application Flash not valid
Erasing Application Area...
Done.
Starting update from UART.
Please start file send using XModem protocol....

Bootloader Code addresses;

#define APP_VECTOR_START (0XFFFFFF70U)

/* This is the last address of the user's fixed vector table, used for checking jump address*/

#define APP_VECTOR_END (0xFFFFFF73U)

/* Start of the user application code */

/* Ensure this is the very start of a flash block*/

/* By default this is the top of flash */

#define APP_START (0xFFFD0000)

/* End of application area */

/* CRC calculation is performed for all addresses APP_START to APP_END */

/* Ensure this is the last address of a flash block, including the fixed vectors */

/* but not including the calculated checksum */

#define APP_END (0xFFFFFF7B)

/* Location in application code space that contains stored checksum */

/* must be a multiple of 4 to allow the flash self-prog library to work */

#define APP_CRC_CHECKSUM_PTR ((uint32_t *)(0xFFFFFF7C))

Application code linker_script;

MEMORY
{
RAM : ORIGIN = 0x00007000, LENGTH = 0x9000
ROM : ORIGIN = 0xFFFD0000, LENGTH = 196608
OFS : ORIGIN = 0x120000, LENGTH = 128
}
SECTIONS
{
.exvectors 0xFFFFFEF4: AT(0xFFFFFEF4)
{
"_exvectors_start" = .;
KEEP(*(.exvectors))
"_exvectors_end" = .;
} >ROM
.fvectors 0xFFFFFF70: AT(0xFFFFFF70)
{
KEEP(*(.fvectors))
} > ROM
.text 0xFFFD0000: AT(0xFFFD0000)
{
*(.text)
*(.text.*)
*(P)
etext = .;
} > ROM
.rvectors ALIGN(4):
{
_rvectors_start = .;
INCLUDE ..\src\smc_gen\r_bsp\mcu\all\linker_script_rvectors.inc
_rvectors_end = .;
} > ROM
.init :
{
KEEP(*(.init))
__preinit_array_start = .;
KEEP(*(.preinit_array))
__preinit_array_end = .;
__init_array_start = (. + 3) & ~ 3;
KEEP(*(.init_array))
KEEP(*(SORT(.init_array.*)))
__init_array_end = .;
__fini_array_start = .;
KEEP(*(.fini_array))
KEEP(*(SORT(.fini_array.*)))
__fini_array_end = .;
} > ROM
.fini :
{
KEEP(*(.fini))
} > ROM
.got :
{
*(.got)
*(.got.plt)
} > ROM
.rodata :
{
*(.rodata)
*(.rodata.*)
*(C_1)
*(C_2)
*(C)
_erodata = .;
} > ROM
gcc_exceptions_table :
{
KEEP (*(.gcc_except_table))
*(.gcc_except_table.*)
} > ROM
.eh_frame_hdr :
{
*(.eh_frame_hdr)
} > ROM
.eh_frame :
{
*(.eh_frame)
} > ROM
.jcr :
{
*(.jcr)
} > ROM
.tors :
{
__CTOR_LIST__ = .;
. = ALIGN(2);
___ctors = .;
*(.ctors)
___ctors_end = .;
__CTOR_END__ = .;
__DTOR_LIST__ = .;
___dtors = .;
*(.dtors)
___dtors_end = .;
__DTOR_END__ = .;
. = ALIGN(2);
_mdata = .;
} > ROM
.data : AT(_mdata)
{
_data = .;
*(.data)
*(.data.*)
*(D)
*(D_1)
*(D_2)
_edata = .;
} > RAM
.bss :
{
_bss = .;
*(.bss)
*(.bss.**)
*(COMMON)
*(B)
*(B_1)
*(B_2)
_ebss = .;
. = ALIGN(128);
_end = .;
} > RAM AT>RAM
.ofs1 0x120040: AT(0x120040)
{
KEEP(*(.ofs1))
} > OFS
.ofs2 0x120048: AT(0x120048)
{
KEEP(*(.ofs2))
} > OFS
.ofs3 0x120050: AT(0x120050)
{
KEEP(*(.ofs3))
} > OFS
.ofs4 0x120060: AT(0x120060)
{
KEEP(*(.ofs4))
} > OFS
.r_bsp_NULL :
{
. += 0x100;
"_r_bsp_NULL_end" = .;
} >RAM
.r_bsp_istack BLOCK(0x4) (NOLOAD) :
{
KEEP(*(.r_bsp_istack))
} >RAM
.istack :
{
"_istack" = .;
} >RAM
.r_bsp_ustack BLOCK(0x4) (NOLOAD) :
{
KEEP(*(.r_bsp_ustack))
} >RAM
.ustack :
{
"_ustack" = .;
} >RAM
}

Could you please help me to fix this problem ?
or do you have any advice ?

Thank you.

Parents
  • Dear user, I hope you're doing well.
    After investigating your project files, I realized that you were working on a manipulated version of the bootloader example files of the RX66-T starter kit.
    The original files are here: rx66t_starterkit_bootloader_example.rar (Extracted from this link)
    that example should obey the section setting provided by the "R20AN0460EG0110" document. 

    Your manipulated code had some trouble with the user application  start and end  vector values. please check out the above files which demonstrate correct configuration and provide correct examples both for the bootloader and application code. 

    I hope you find it helpful, don't hesitate to ask questions if you need. 

    Best regards, 
    Hossein.  

    If this or any other user's response answers your concern, kindly verify the answer. Thank you!

    Renesas Engineering Community Moderator
    https://community.renesas.com/
    https://academy.renesas.com/
    en-support.renesas.com/.../

  • Hi, Thank you for reply. Actually I compared my code and your sharing. My code implemented for our product. 
    There are two cards that we designed and wired ourselves. One of the cards allows downloading the application code via the bootloader, but the other does not. I load the same bootloader code on both cards and throw the same .mot file.

    Tera term and debug screen on the working card is as follows;

    Tera term and debug screen on the non-working card is as follows;

    The starting address is 0xFFFD0000 in the stream, but when j is pressed for the jump operation, it becomes 0xFFFFFFFF.

    When I throw the application code without a bootloader, it works normally on both cards.

    What else should I check in the code?



Reply
  • Hi, Thank you for reply. Actually I compared my code and your sharing. My code implemented for our product. 
    There are two cards that we designed and wired ourselves. One of the cards allows downloading the application code via the bootloader, but the other does not. I load the same bootloader code on both cards and throw the same .mot file.

    Tera term and debug screen on the working card is as follows;

    Tera term and debug screen on the non-working card is as follows;

    The starting address is 0xFFFD0000 in the stream, but when j is pressed for the jump operation, it becomes 0xFFFFFFFF.

    When I throw the application code without a bootloader, it works normally on both cards.

    What else should I check in the code?



Children
  • Post crashed. Tera term and debug screen on the working card is as follows;

  • Hi, it's completely nonsense to me to program the same binary file on the same hardware and get different results,
    I recommend you to fully erase the flash memory of those and then try reprogramming. 

    You stated, "When I throw the application code without a bootloader, it works normally on both cards." meanwhile if you had the correct setup you would end up crashing the CPU when directly programming application code without a bootloader, as it should have different RESET_VECTOR address and CPU shouldn't fetch correct address of the beginning of the application code. 

    In the example that I provided, here's the section setup of the bootloader and user application:

    -Boot loader linker section setting:
      
    -User application linker section setting: 



    -your application code and bootloader code should have no section overlapping and the RESETVECT must not be the same. 

    I strongly recommend to check out this document. 
    Kind regards, 
    Hossein.

    If this or any other user's response answers your concern, kindly verify the answer. Thank you!

    Renesas Engineering Community Moderator
    https://community.renesas.com/
    https://academy.renesas.com/
    en-support.renesas.com/.../

  • Hi, I'am working with MCU R5F566TAAxFM (rom :256 Kbytes, size: 64Kbytes, Pin count: 64

    So, my addresses different from starterkit MCU. Also, the link which you shared is dead.

    Could you please help me writing addresses for my MCU. 

    Bootloader toolchain CC-RX. 
    Application Toolchain RX. 

    Bootloader section.

    linker_script.d code as below;

    MEMORY

    {

    RAM : ORIGIN = 0x00007000, LENGTH = 0x9000

    ROM : ORIGIN = 0xFFFD0000, LENGTH = 196607

    OFS : ORIGIN = 0x120000, LENGTH = 128

    }

    SECTIONS

    {

    .exvectors 0xFFFFFEF4: AT(0xFFFFFEF4)

    {

    "_exvectors_start" = .;

    KEEP(*(.exvectors))

    "_exvectors_end" = .;

    } > ROM

    .fvectors 0xFFFFFF70: AT(0xFFFFFF70)

    {

    KEEP(*(.fvectors))

    } > ROM

    .text 0xFFFD0000: AT(0xFFFD0000)

    {

    *(.text)

    *(.text.*)

    *(P)

    etext = .;

    } > ROM

    .rvectors ALIGN(4):

    {

    _rvectors_start = .;

    INCLUDE ..\src\smc_gen\r_bsp\mcu\all\linker_script_rvectors.inc

    _rvectors_end = .;

    } > ROM

    .init :

    {

    KEEP(*(.init))

    __preinit_array_start = .;

    KEEP(*(.preinit_array))

    __preinit_array_end = .;

    __init_array_start = (. + 3) & ~ 3;

    KEEP(*(.init_array))

    KEEP(*(SORT(.init_array.*)))

    __init_array_end = .;

    __fini_array_start = .;

    KEEP(*(.fini_array))

    KEEP(*(SORT(.fini_array.*)))

    __fini_array_end = .;

    } > ROM

    .fini :

    {

    KEEP(*(.fini))

    } > ROM

    .got :

    {

    *(.got)

    *(.got.plt)

    } > ROM

    .rodata :

    {

    *(.rodata)

    *(.rodata.*)

    *(C_1)

    *(C_2)

    *(C)

    _erodata = .;

    } > ROM

    gcc_exceptions_table :

    {

    KEEP (*(.gcc_except_table))

    *(.gcc_except_table.*)

    } > ROM

    .eh_frame_hdr :

    {

    *(.eh_frame_hdr)

    } > ROM

    .eh_frame :

    {

    *(.eh_frame)

    } > ROM

    .jcr :

    {

    *(.jcr)

    } > ROM

    .tors :

    {

    __CTOR_LIST__ = .;

    . = ALIGN(2);

    ___ctors = .;

    *(.ctors)

    ___ctors_end = .;

    __CTOR_END__ = .;

    __DTOR_LIST__ = .;

    ___dtors = .;

    *(.dtors)

    ___dtors_end = .;

    __DTOR_END__ = .;

    . = ALIGN(2);

    _mdata = .;

    } > ROM

    .data : AT(_mdata)

    {

    _data = .;

    *(.data)

    *(.data.*)

    *(D)

    *(D_1)

    *(D_2)

    _edata = .;

    } > RAM

    .bss :

    {

    _bss = .;

    *(.bss)

    *(.bss.**)

    *(COMMON)

    *(B)

    *(B_1)

    *(B_2)

    _ebss = .;

    . = ALIGN(128);

    _end = .;

    } > RAM AT>RAM

    .ofs1 0x120040: AT(0x120040)

    {

    KEEP(*(.ofs1))

    } > OFS

    .ofs2 0x120048: AT(0x120048)

    {

    KEEP(*(.ofs2))

    } > OFS

    .ofs3 0x120050: AT(0x120050)

    {

    KEEP(*(.ofs3))

    } > OFS

    .ofs4 0x120060: AT(0x120060)

    {

    KEEP(*(.ofs4))

    } > OFS

    .r_bsp_NULL :

    {

    . += 0x100;

    "_r_bsp_NULL_end" = .;

    } > RAM AT>RAM

    .r_bsp_istack ALIGN(0x4) (NOLOAD) :

    {

    KEEP(*(.r_bsp_istack))

    } > RAM AT>RAM

    .istack :

    {

    "_istack" = .;

    } > RAM

    .r_bsp_ustack ALIGN(0x4) (NOLOAD) :

    {

    KEEP(*(.r_bsp_ustack))

    } > RAM AT>RAM

    .ustack :

    {

    "_ustack" = .;

    } > RAM

    }


    Is there anything incompatible or wrong between the bootloader section and the application script?

    Thank you for your quick reply.

  • The link is referencing the "R20AN0460EG0110" application note. if you didn't check it yet. 


    The only thing that I noticed, is this line in your bootloader code,

    "#define APP_VECTOR_END (0xFFFFFF73U)"

    which is  "#define APP_VECTOR_END (0xFFFFFF48U)" in the sample code. 

    According to your ROM size, the order of the flash blocks seems OK to me.

  • Thanks for your support. I may not be able to explain the problem fully, I'm sorry. There is something I don't quite understand. Even when I enter debug with my bootloader code after erasing all blocks of the memory of the processor to which I can code with the bootloader, or after erasing the chip, the content of the address 0xFFFC0000 and beyond becomes FFFF, so I cannot write to the processor. The code flows during debug, but when I check the memory, I see it full of FFFF starting from address 0xFFFC0000. Do I need to do anything about accessing the flash in order to successfully reset my bootloader code after the erase process? Additionally, when I throw my application code without a bootloader, I can run it after the erase operations. 

  • Dear user, let me investigate it and I'll get back to you. 
    Meanwhile, If you figure out something, please keep me updated.