Chip Select pin in SPI communication (RX72N)

Hello,

I'm working on communicating with a Pmod CAN controller connected to the CN5 (Pmod) port of the RX72N Envision Kit. I'm currently using the SCI/SCIF Clock Synchronous Mode to send and receive messages to the Pmod CAN controller. The MCP25625 integrated in the Pmod CAN controller requires the CS pin to be LOW before initiating a SPI communication, and then to return it to HIGH when the communication ends.

The thing is, the CS pin in the MCP25625 is mapped to the pin 52 in the RX72N Envision Kit, which is set to the SS2# (Slave Select 2) function in the Pin configuration section of Smart Configurator. This raises the following question:

The direction of pin 52 is fixed to Input, which is technically incorrect since the MCP25625 requires a variable LOW/HIGH signal on its CS pin, controlled by the RX72N's pin 52. Smart Configurator does not allow changing pin 52 to Input/Output mode nor it allows setting another pin for the task SS2#.