RX72n Can we have both GLCD and allow external parallel bus access to an FPGA?

Reading another thread seemed to indicate there is a way for GLCD have access to external SDRAM as a frame buffer. If this is true then is there a way to get external FPGA access as well? Yet the smart configurator does not allow sharing External Bus pins and LCD_DATAn pins. The thought is if external bus is available we could hang some other parallel device there as well.

Is it possible to leverage external SDRAM space with a separate CSn# for an FPGA? We are targeting the RX72n 144 pin package. Reasoning time constraints dictate the need for fast (parallel) FPGA access of captured measurement data to unpack, calculate, and reconfigure before our next acquisition event.

If not possible are there app notes showing how to build GLCD running on external SDRAM frame buffers?

Thanks!

Russ

Reference other thread titled: RX72N External RAM and LCD interfacing