RZ/N1D: CM3 AIRCR SYSRESETREQ signal not triggering reset.


I have an RZ/N1D on a custom board and I am trying to get the CM3 to reset itself without making use of the CA7 or the watchdog. The standard method seems to be writing to the SYSRESETREQ bit of the CM3's Application Interrupt and Reset Control Register. There is a function in the cmsis code I'm using that does this, NVIC_SystemReset(), which writes that bit along with the vectkey, and then drops into an infinite loop to wait for the reset. When I call this function however, after writing the register and dropping into the loop, nothing happens, no reset is triggered and execution stays in the loop. The SYSRESET_REQ bit in the RSTEN register is set.

When researching this I noticed in the ARM developer docs that the implementation of the SYSRESETREQ signal is vendor dependent, so I'm wondering if this signal is expected to work on this system, and if so, if I could get some information on it to help me figure out why it isn't. Thank you.