How to implement UART RS485 for RZ/T1?How to achieve RZ/T1, such as SCIFA0 by configuring the receive pin to send data to the pin so that its core can receive data, which can be observed through simulation?

How to implement UART RS485 for RZ/T1?
"I used SN75176 as an RS485 control peripheral and R7S910025CBG as the kernel. I configured P40 as the TXD0 transmit pin and P42 as the RXD0 receive pin and P43 transmit and receive control pin. I attempted to send and receive data through the PC through preliminary configuration of the underlying layer. Through testing, I could write data to the FDRD register, set SN75176 in transmit mode, and the PC could receive data.", However, by setting SN75176 to receive mode, the PC sends data frames to the P42 receive pin. However, through simulation and observation of SCIFAO.FDR.BIT.R, it is found that there is no data change. This is why and how can RXD0 be enabled to receive data