RZT1 + YT8512H How to config register EtherCAT Phy

RZT1 + YT8512H How to config register EtherCAT Phy?

RZT1 + KSZ8041 is ok;but The MDC MDIO pin of the RZT1 + YT8512H was viewed with an oscilloscope without any waveform。

I have checked the hardware circuit and software configuration according to the RX72M+YT8512H given by the agent, but there is still no effect. I also consulted other friends but the results were the same.

I think the problem lies in the register configuration of RZT1, because the registers of RZT1 are older and there are many differences.

Note that the MDC pin can output waveform when configured as normal IO.Also referred to  “an-r01an3169ej0110-rzt1-ethercat.zip”

What would cause MDC pins to have no waveform? 

I need your help.

int main (void)
	// --- Initialize board depend ---

    /* Initialize the port function */

    /* Initialize the ECM function */

   /* Initialize the ICU settings */


    /* ---- CMT Setting ---- */
    /* Initialize CMT */

    /* Start CMT */
    R_CMT_CreatePeriodic(CMT_CH_0, 20, ledout);
    R_CMT_CreatePeriodic(CMT_CH_1, 10, inputinc);

	/* setup EtherCAT														*/
	// --- Initialize EtherCAT ---

	/* set esc register base address */

	/* initialize the EtherCAT slave interface */

	/* enable irq */

  • Hello,

    RZ/T1 and RX72M embedded with the same EtherCAT Slave Controllers(Beckhoff IP Core V2.04). So the function should be the same. Different configuration might have certain impact to the register setup in device to device. Difference could be in ESC register base address. But RZT1 registers are not “old”.

    If YT8512H works with RX72M, it is expected and should work with RZ/T1. Does the combination RX72M+YT8512H is practically working correctly under EtherCAT? 

    I had a quick search on Beckhoff PHY Selection Guide(https://download.beckhoff.com/download/document/io/ethercat-development-products/an_phy_selection_guidev2.7.pdf). YT8512H is not listed under chapter 2.3.3 Example Ethernet PHYs. After all you can also check the Chapter 2.1 Ethernet PHY Requirements for EtherCAT to see if YT8512H can fulfill the EtherCAT PHY requirements.

    There are two MDIO interface and I am not sure if you have applied the right PinMux setting to see the right MDC webform. Please check the right PinMux for the right MDIO interface.

  • you Guide is Very valuable for reference.

    I just found that the output waveform of MDIO after power-on depends on the communication of eeprom, because I found that my eeprom anomaly (no waveform in iic SDL SCLK) resulted in no output waveform in MDIO.
    The conclusion of the experiment is that after power-on, it needs to communicate with the eeprom (and the eeprom is burned), and then MDIO can test the waveform. If the eerpom does not communicate or the eeprom is empty, MDIO cannot test the waveform
    As for the principle of PHY communication of ECAT and the working principle of eeprom of ECAT, I do not know much about it, nor have I seen any introduction on the official website of Renesas RZT1
    I have had my ECAT eeprom repaired, pending further testing.
    But I have a question. When a new board is powered on (eeprom is empty), the ECAT can still be connected to the main station normally, and the RJ45 lights work normally. Then I guess MDIO should also have waveform. Because my original problem was that the ECAT board (RZT1+YT8512H) could not be connected to the master station, and then the test found that the MDIO pin had no waveform. (I don't have RX72M board, so I can't test and verify RX72M+YT8512H)
  • The ETG is providing a lot of valuable documents regarding the EtherCAT Slave Controller (ESC) and the requirements of the PHYs for the ESCs. In the document "Application Note – PHY Selection Guide Requirements to Ethernet PHYs used for EtherCAT and EtherCAT G Ethernet PHY Examples" you find the very concrete requirement which is most probably answering your evaluations of not seeing MDIO interface traffic (then the test found that the MDIO pin had no waveform):

    • PHY configuration must not rely on configuration via the MII management interface, i.e., required features have to be enabled after power-on, e.g., by default or by strapping options. PHY startup should not rely on MII management interaction, i.e., MDC clocking, since many ESCs do not communicate with the PHY via management interface unless the EtherCAT master requests this (only the EtherCAT IP Core with MI Link detection and configuration will communicate without master interaction).