Slow Display refresh on RA6M3 custom Board

DRW buffer cache is enabled. 

Add the define RM_GUIX_PORT_CFG_DRW_BURST_WRITE_ENABLED to the compiler defines :- 

I did that but it is entering hard fault error.

RM_GUIX_PORT_CFG_DRW_BURST_WRITE_ENABLED

Now display is not coming. 

it is stuck at _gx_system_dirty_partial_add() -> GX_ENTER_CRITICAL

Edit:

it is failing here

d2_dev->renderbuffer[1] = (d2_rbuffer*) d2_newrenderbuffer( handle, d2_dev->dlistblocksize, d2_dev->dlistblocksize );

in d2_s32 d2_inithw( d2_device *handle, d2_u32 flags )

hello AZ [Renesas]   any update on this ?

When I tried to run the project you shared I got an error because the stack of the thread exceeded the minimum stack size.

I am trying to replicate on EK-RA6M3 but it is not very simple because I use EK-RA6M3 which has no on-board QSPI.

Please also refer to the following notes from FSP manual regarding the DRW driver:

Earlier I had this issue of stack size reset 

Thread stack size reset

then I made tx_user.h as read only.  set stack size as 64000 for all threads. 

Earlier I had this issue of stack size reset 

Thread stack size reset

then I made tx_user.h as read only.  set stack size as 64000 for all threads. 

Ok, but the minimum stack size cannot be greater than the thread's stack size.

change minimum stack size to 64000 and make tx_user.h as read only.