Is there a register in the RH850 U2A chip that can indicate whether it is currently in Debug Mode (connected to a debugger)?

Question

Hello, expert： 
 Is there a register in the RH850 U2A chip that can indicate whether it is currently in Debug Mode (connected to a debugger)?

Erik · Accepted Answer

Hello wtx, 
 please contact the Lauterbach Support regarding the issue. 
 
 Best regards, 
 Erik

JimB · Answer

The LB scripts and commands have evolved a bit since I last used it. As I have neither a LB for RH850 nor the U2A hardware to test, it is quite difficult to interpret the script commands related to handling multicore control. But I am wondering about the three lines in the script: SYStem.CONFIG CoreNumber 10. <- setup 10 hardware threads? SYStem.CONFIG CORE 2. 1. CORE.ASSIGN 1. 2. The PDF for RH850 (debugger_rh850.pdf) has this statment: Assign target cores to the individual instances. Use either “SYStem.CONFIG.CORE ” or “CORE.ASSIGN ”. The parameter must be the same for all cores on the same chip. Your script uses both commands which may be problematic, I'm not sure. I don't understand why 10 hardware threads are being configured. You might want to review the commands in this script, and possibly involve Lauterbach tech support. Looking at the provided demo scripts from the LB web site, I see that the debugger is explicitly setting the start address of the PC for logical core1. This may be used if the reset vector is not properly set, but I am wondering if your core that is triggering the lock-step fault is starting from the wrong place which could easily trigger that fault. If you single-step with this core can you verify that the correct startup sequence is being executed?

wtx · Answer

Sorry for the late reply. We contacted Lauterbach's official support, and they suggested that we use the hotplug-in feature as a temporary workaround for the issue.

JimB · Answer

Unfortunately there is no way to know if a debugger is attached, the CPU does not have access to the debug control unit. 
 How I have dealt with this is to reserve a RAM location that is initialized to 0 via the C-startup, and use the debugger to write a known value that could be checked by the running program.

AZ [Renesas] · Answer

Hello, 
 The DCLS error is caused by a lockstep verification failure. At first, lockstep can be disabled by setting bits 19 to 17 in Option Byte 9. 
 To avoid any lockstep problems, RAM and register initialization has to take place.

Is there a register in the RH850 U2A chip that can indicate whether it is currently in Debug Mode (connected to a debugger)?

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