FCL Flash driver for F1KMS4 is not working with IAR compiler

Hello,

If the program runs only with a debugger connected, it may be because of ECC errors. An ECC error can occur when accessing un-initialized parts of RAM. When the debugger is connected RAM is initialized automatically. When there is no debugger, it is recommended to manually initialize RAM. For how to do this please refer below on this article:

en.na4.teamsupport.com/.../19957725

How are other peripherals like CAN and SPI working correctly in this case? We have implemented similar code, but it's still not functioning. Is there any specific configuration required for the FLMD (Flash Mode) pin, or any related setting needed in the IAR environment?

The FLMD0 pin should be high with one of the two following methods:

]Can you share your RAM initialization code ?

Please see it below :

Reference for FLMD0 configuration  #define WRITE_PROTECTED_REG(reg, val) \
(reg) = (val); \
(reg) = (~(val)); \
(reg) = (val);

#define WRITE_FLMDP_REG(reg, val) \
do { \
FLMDPCMD = 0xA5; \
WRITE_PROTECTED_REG(reg, val);\
} while (FLMDPS != 0)

#define FPMON (*(volatile uint8_t *)(0xFFA10000uL))

void Flash_Init(void)
{
volatile r_fcl_status_t fcl_status;

// Step 1: Initialize the Flash Control Library
fcl_status = R_FCL_Init((r_fcl_descriptor_t *)&sampleApp_fclConfig_enu);

if (fcl_status != R_FCL_OK)
{
// Handle initialization error (optional)
return;
}

// Step 2: Set FLMDCNT to 0x01 using protected write to enable Flash Mode
while (FLMDCNT != 0x01)
{
WRITE_FLMDP_REG(FLMDCNT, 0x01);
}

// Step 3: Wait for FWE (Flash Write Enable) bit in FPMON to be set
while ((FPMON & 0x80) == 0)
{
__nop(); // Wait until FWE == 1
}

I do not see any RAM initialization on this code.

Oops, Sorry 

// Define RAM regions to be initialized
#define iRAM_0_START 0xFEDD8000
#define iRAM_0_END   (iRAM_0_START + (32 * 1024) - 1)

#define iRAM_1_START 0xFEDE0000
#define iRAM_1_END   (iRAM_1_START + (128 * 1024) - 1)

#define iRAM_R_START 0xFEE00000
#define iRAM_R_END   (iRAM_R_START + (32 * 1024) - 1)

int __lowinit(void)
{
    volatile unsigned int* p;

    // Initialize Primary RAM (most critical)
    for (p = (unsigned int*)iRAM_1_START; p <= (unsigned int*)iRAM_1_END; p++)
    {
        *p = 0;
    }

    // Optional: Initialize Secondary RAM
    /*
    for (p = (unsigned int*)iRAM_0_START; p <= (unsigned int*)iRAM_0_END; p++)
    {
        *p = 0;
    }
    */

    // Optional: Initialize Retention RAM
    /*
    for (p = (unsigned int*)iRAM_R_START; p <= (unsigned int*)iRAM_R_END; p++)
    {
        *p = 0;
    }
    */

    return 1; // return 1 to continue with normal startup
}

Have you modified the RAM addresses in the code to match those of your device ?

Yes.

Which the part number of your device ?

Any update?