RH850 + UJA1167 INIT Code...

Hi kyle , 

do you mind sharing the exact RH850 device you are using? 
Did you try to observe the RX line in order to see, if the UJA1167 is transmitting data to the MCU? 

Regards 

PC_Renesas

IDE : CS+

MCU : R7F701689

C1 : SI

C2 : SC

C3 : SO

CS+ setting

Changing the settings in CS+ doesn't work either.

// uja1167 CODE

status_t SBC_DataTransfer(const sbc_register_t regName,
const uint8_t* const sendData, uint8_t* const receiveData)
{

status_t status = STATUS_SUCCESS;

uint16_t command[2] = {0U, 0U};
uint16_t readOnlyMask = 0x00U;
uint16_t readData[2] = {0U, 0U};

/* Test if there is data for sending. */
if(sendData == NULL)
{
/* This transfer is read only. */
readOnlyMask = 0x01U;
command[0] = 0U;
}
else
{
command[0] = *sendData;
}

/* Address of device with read only bit. */
command[1] = (uint16_t)((SBC_UJA_REG_ADDR_F(regName) | readOnlyMask) & 0x00FFU);

R_Config_CSIH0_Send_Receive(command, 2u, readData, _CSIH_SELECT_CHIP_6);

if(readData[1] != command[1])
{
status = SBC_COMM_ERROR;
}

/* Copy content of register to receive data. */
if(receiveData != NULL)
{
*receiveData = readData[0];
}

return status;
}

The uja1167 source was obtained from NXP.

CAN communication is fine, but SPI communication is problematic...

Thanks for the information.

The weird thing here is that both the MISO and MOSI lines are doing almost the same - at least for the first high flank. That shouldn't be the case. 
Looking into the Datasheet of the NXP device, I noticed, that you have to draw the Chip Select line down in order to communicate with the Slave

Did you do that too? 
Is one of the defined callbacks being called (Communication interrupt or communication error interrupt)? 

Thanks for the information.

The weird thing here is that both the MISO and MOSI lines are doing almost the same - at least for the first high flank. That shouldn't be the case. 
Looking into the Datasheet of the NXP device, I noticed, that you have to draw the Chip Select line down in order to communicate with the Slave

Did you do that too? 
Is one of the defined callbacks being called (Communication interrupt or communication error interrupt)? 

CS is LOW. I feel like TX is normal, but RX is not working... I think it's a timing issue. Callback is also being called.

What is happening inside the Callback? Are there Values inside the CSIGnRX0 Register?
What is the status of the Status register CSIGnSTR0, before transmissionand inside the interrupt ?

Ok Thanks. 
1. The CS line is low -> the Slave knows that he is being talked to
2. The Callback is being triggered
3. When you stop the program in the callback function, you can see the Value is 0x90, which referring to the datasheet means the TSF bit is set

This means a transfer is in progress. It will most likely be reset when you transfer the values of the RX0 register to a variable. 
4. The RX0 register is filled with values. That means, data was received. 

What you can do now to make absolutely sure that data was actually received is to take a pointer and point to the Value in the CSIGnSTCR0 register. 

Point to the register content and check if the value is at 0 before reception and has any value when you stop the program inside the callback. If thats the case. I consider the SPI bus working.

I hope this helps

regards 

PC_Renesas

Thank you for your help.