Serial NOR Flash pause read's by holding SCLK low

Question

Hello, during a burst read, if i hold SCLK low, and then re-start clocking 'x cycles' later will that cause any issues with auto-reading out the entire memory array using Quad SPI mode?

OV_Renesas · Answer

Hi There, Thank you for the reply. 
 jonrosea said: during a burst read, if i hold SCLK low, and then re-start clocking 'x cycles' later will that cause any issues with auto-reading out the entire memory array using Quad SPI mode? 
 Please refer on the AT25QF128A Datasheet , And Section 8.2 Read Commands, on page: 23 It would not be suggested to explicitly hold the SCLK to LOW. The Serial Clock provides the synchronization reference for the SPI interface, by keeping it Low it will make the SPI driver and the AT25 NOR Flash to not work as expected. Best Regards, OV_Renesas