Timing violation of 7025L20PFGI SRAM

Hi,

I want to inquire about why a timing violation occurred in this situation. What does it mean by not being stable within 12 ns? (The high-frequency clk has a cycle of 10 ns.)


Thanks!

Best Regards,
Jason Shih

Parents Reply
  • Dear ,

    I think "taa" means "Access Time from Address" (as shown in the right picture), so I need to change this value to 20 ns. Is that correct?

    And if I want to change the device speed, I just need to adjust taa to 15/17/20/25/35/55.

    Additionally, I want to confirm whether I can only use a 20 ns clock for a device with a 20 ns access time, or can't it be a higher/lower value?

    Thank you very much for your response!

    Best,
    Jason Shih

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