Combining reverse operation and burst mode in ISL81601

Hi Domink, I will get back to you in a while.

Regards,

Avinash Kumar

Hi Domink,

"The ISL81601 can support both burst mode for light load efficiency (that is when input power source is online, and the capacitors are fully charged) and reverse power mode for back feeding power from the output to the input (in case of voltage drop at the input). 

Let me clarify more:

1. When the converter operates in forced PWM mode this allows the reverse flow of coil current, helps in maintaining active control over the power flow, making it possible for the ISL81601 to effectively manage reverse current flow and support input voltage regulation during drops. This capability is crucial for applications like UPS systems, where maintaining power to the input is essential during voltage sags or power interruptions.

2. The diode emulation mode (DE mode) is used for burst-mode operation, where the regulator switches off during the duty cycle when the inductor current crosses zero. In this mode, the driver automatically detects this zero-crossing point and turns off the low-side FET at that moment, effectively emulating diode action. This approach allows the body diode to conduct and reduces additional power loss, even while the inductor current remains positive.

In order to achieve the above-mentioned points, kindly go through the steps below:

3. The pin number 2 (QFN) or pin number 9 (HTTSOP) is the input voltage feedback pin for reverse direction operation. Use a resistor divider to feed the input voltage back to this pin. When the input voltage drops to the pin voltage below 0.8V, the internal control loop reduces the duty cycle to sink in current from output to input to keep the pin voltage regulated at 0.8V. Keep the pin voltage below 0.3V to disable the reverse direction operation.

4. While the LG1 pin (pin number 22 on QFN or pin number 32 on HTTSOP) sets the PWM mode using a resistor connected between the pin and ground during the initiation stage before soft-start, if the pin voltage is less than 0.3V, the converter is set to forced PWM mode; otherwise, if the voltage is higher than 0.3V, the ISL81601 is set to DE mode for burst mode operation to improve light load efficiency. 

Adding resistor from LG1 to PGND won't affect burst mode and reverse mode at a time. Kindly give me an update if you have any other query.

Regards,

Avinash Kumar

This answer seems to be incorrect. I can tell with significant level of certainty, that this is not true due to two reasons: 

1. During bench prototype tests and simulations I couldn’t enter burst mode during forced PMW operation. It was only possible during DE operation (with no resistor from LG1 to PGND). 

2. In Datasheet there are some sentences, that suggest, that burst mode is only native for DE mode. For example:

“Output current monitor. The current from this pin is proportional to the differential voltage between the ISEN+ and ISEN- pins. Connect a resistor and capacitor network between the pin and SGND to make the pin voltage proportional to the average output current. When the pin voltage reaches 1.2V, the internal average current limit loop reduces the output voltage to keep the output current constant when constant current OCP mode is set or the converter shuts down when hiccup OCP mode is set. In DE Burst mode, when this pin voltage is less than 850mV, the controller runs in Burst mode. When this pin voltage is higher than 880mV, the controller exits Burst mode. When a higher resistance on this pin is used to set its voltage higher than 880mV at no load condition, the controller runs in DE mode with no burst operation.” - P11

“DE mode burst operation off state enable signal. The pin is pulled up to 5V by an internal 250k resistor in PWM and DE modes and burst mode on state. It is pulled low in Burst mode off state. The pull-down MOSFET rDS(ON) resistance is about 4.5k. Connect this pin together in multi-chip parallel operation application to sync all the chips together for the burst operation.” – P12

Title of table segment - “Diode Emulation Burst Mode” – P17

“Because the VOUT is controlled by a window comparator in Burst mode, higher than normal low frequency voltage ripples appears on the VOUT, which can generate audible noise if the inductor and output capacitors are not chosen properly. Also, the efficiency in D/(1-D) Buck-Boost mode is low. To avoid these drawbacks, the Burst mode can be disabled by choosing a bigger RIM_OUT to set the IMON_OUT pin voltage higher than 0.88V at no load condition, shown in Equation 14. The part runs in DE mode only. Pulse Skipping mode can also be implemented to lower the light load power loss with much lower output voltage ripple as the VOUT is always controlled by the regulator Gm1.” – P36 

NOTHING about PMW burst mode. 

Hi DB. How are you doing with the ILS81601 chip?