parallel display for rzg2l /rzv2l (5.10 kernel)

Hi 
Can you list supported parallel(not lvds parallel bridge) displays for kernel version 5.10 Also if possible can you provide dts entry for parallel display

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  • He hienhuynh can you list any displays you have used with the above dts entry???

  • Hi anzal,

    Could you retry by using drm_display_mode instead of display_timing for panel definition.

    You can refer this struct for your panel then retry.

    static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
    	.clock = 9000,
    	.hdisplay = 480,
    	.hsync_start = 480 + 5,
    	.hsync_end = 480 + 5 + 1,
    	.htotal = 480 + 5 + 1 + 40,
    	.vdisplay = 272,
    	.vsync_start = 272 + 8,
    	.vsync_end = 272 + 8 + 1,
    	.vtotal = 272 + 8 + 1 + 8,
    };
    
    static const struct panel_desc giantplus_gpg482739qs5 = {
    	.modes = &giantplus_gpg482739qs5_mode,
    	.num_modes = 1,
    	.bpc = 8,
    	.size = {
    		.width = 95,
    		.height = 54,
    	},
    	.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
    }

  • what about the hsync , vsync and de flags???

  • Hi anzal,

    Please refer some similar panels info in panel-simple to fill the flags.

    By the way, do you enable CONFIG_DRM_PANEL_SIMPLE in your defconfig?

  • i tried the method with the display mode 

    &lcdif {
    	pinctrl-names = "default";
    	pinctrl-0 = <&pinctrl_lcdif_dat
    		     &pinctrl_lcdif_ctrl>;
    	display = <&display0>;
    	status = "okay";
    
    	display0: display0 {
    		bits-per-pixel = <16>;
    		bus-width = <24>;
    
    		display-timings {
    			native-mode = <&timing0>;
    			timing0: timing0 {
    			clock-frequency = <9000000>;
    			hactive = <480>;
    			vactive = <272>;
    			hfront-porch = <8>;
    			hback-porch = <4>;
    			hsync-len = <41>;
    			vback-porch = <2>;
    			vfront-porch = <4>;
    			vsync-len = <10>;
    
    			hsync-active = <0>;
    			vsync-active = <0>;
    			de-active = <1>;
    			pixelclk-active = <0>;
    			};
    		};
    	};
    };
    

    this is the working dts entry for this display in imx processor

    static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
        .clock = 9000, 
        .hdisplay = 480,
        .hsync_start = 480 + 8,
        .hsync_end = 480 + 8 + 41,
        .htotal = 480 + 8 + 41 + 4,
        .vdisplay = 272,
        .vsync_start = 272 + 4,
        .vsync_end = 272 + 4 + 10,
        .vtotal = 272 + 4 + 10 + 2,
        .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
    };
    
    static const struct panel_desc giantplus_gpg482739qs5 = {
        .modes = &giantplus_gpg482739qs5_mode,
        .num_modes = 1,
        .bpc = 16,
        .size = {
            .width = 95,
            .height = 54,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
        .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE ,
    };

    This is the modification i made for display mode of giantplus can you just check and verify if the configuration is okay

  • Hi anzal,

    Describe display timings in devicetree when you use "compatible = "panel-simple"".

    If you define the specific panel, you just need to describe with your code:

    static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
    .clock = 9000,
    .hdisplay = 480,
    .hsync_start = 480 + 8,
    .hsync_end = 480 + 8 + 41,
    .htotal = 480 + 8 + 41 + 4,
    .vdisplay = 272,
    .vsync_start = 272 + 4,
    .vsync_end = 272 + 4 + 10,
    .vtotal = 272 + 4 + 10 + 2,
    .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
    };

    static const struct panel_desc giantplus_gpg482739qs5 = {
    .modes = &giantplus_gpg482739qs5_mode,
    .num_modes = 1,
    .bpc = 16,
    .size = {
    .width = 95,
    .height = 54,
    },
    .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
    .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE ,
    };

    By the way, for sure, you should add the debug in probing function of both panel-simple.c and rcar_du_drv.c to know what makes probing failure.

  • i did try adding timings in dts with panel-simple as compatible but doesnt seems to work i will try adding debug to driver code and check what is the issue

  • Maybe you can share your debug log here. By the way, does your rootfs have "modetest" command?

  • hello hienhuynh

    i have added debugs in probe functions and it seems that its not even probing(panel_simple.c and rcar_du_drv.c ). Is there any config dependencies for simple panel i need to add to defconfig ???

  • Try adding #address-cells = <1>; and #size-cells = <0>; to your node. I have seen before that if they are missing, it does not work. The kernel documentation actually says they are required.

    	panel_rgb: panel-rgb {
    		compatible = "giantplus,gpm940b0";
    
    		port {
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			panel_in_rgb: endpoint {
    				remote-endpoint = <&du_out_rgb>;
    			};
    		};
    
    	};

    i have added debugs in probe functions and it seems that its not even probing(panel_simple.c and rcar_du_drv.c )


    The only other suggestion is to boot the kernel with initcall_debug to see if the rcar_du and panel_simple drivers are being loaded on kernel boot.

    jira-gasg.renesas.eu/.../Linux Debug Tricks

  • hello chris i tried adding the following things but doesnt seems to work.

     #address-cells = <1>; and #size-cells = <0>;
  • OK, then add initcall_debug to the kernel command line to see if those drivers are really getting loaded or not.

  • Hi anzal,

    I recheck RZ/V2L to support your panel and it can register the panel normally.

    root@smarc-rzg2l:~# dmesg | grep drm
    [    1.395664] [drm] Initialized rcar-du 1.0.0 20130110 for 10890000.display on minor 0
    [    1.403487] [drm] Device 10890000.display probed
    [    1.476741] rcar-du 10890000.display: [drm] fb0: rcar-dudrmfb frame buffer device
    
    root@smarc-rzg2l:~# modetest -M rcar-du
    Encoders:
    id      crtc    type    possible crtcs  possible clones
    38      37      none    0x00000001      0x00000001
    44      0       Virtual 0x00000001      0x00000002
    
    Connectors:
    id      encoder status          name            size (mm)       modes   encoders
    39      38      connected       DPI-1           0x0             1       38
      modes:
            index name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
      #0 480x272 51.25 480 488 531 572 272 276 297 307 9000 flags: ; type: preferred, driver

    I tested in v5.10.201-cip41. If you used old kernel version, please update to cip41 (3.0.6 BSP package).

    Here is the diff that I support. Could you retry in your side?

    Devicetree: RZ/V2L (disable adc due to pin conflict)

    diff --git a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
    index 3857f9f0a67e..9e5b607756c2 100644
    --- a/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
    +++ b/arch/arm64/boot/dts/renesas/r9a07g054l2-smarc.dts
    @@ -59,4 +59,98 @@ isp_work0: SIMPLE_ISP {
                            reg = <0x0 0xB4000000 0x0 0x03000000>;
                    };
            };
    +
    +       panel_rgb: panel-rgb {
    +//             compatible = "giantplus,gpm940b0";   /* Used this compatible if the panel is supported in panel-simple */
    +               compatible = "panel-dpi";
    +               /* panel-timing is used for "panel-dpi" compatible */
    +               panel-timing {
    +                       clock-frequency = <9000000>;
    +                       hactive = <480>;
    +                       vactive = <272>;
    +                       hsync-len = <43>;
    +                       hfront-porch = <8>;
    +                       hback-porch = <41>;
    +                       vfront-porch = <4>;
    +                       vback-porch = <10>;
    +                       vsync-len = <21>;
    +               };
    +
    +               port {
    +                       panel_in_rgb: endpoint {
    +                               remote-endpoint = <&du_out_rgb>;
    +                       };
    +               };
    +
    +       };
    +};
    +
    +&pinctrl {
    +        du_pins: du {
    +               data {
    +                       pinmux = <RZG2L_PORT_PINMUX(14, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(15, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(15, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(16, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(16, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(17, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(17, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(17, 2, 1)>,
    +                                <RZG2L_PORT_PINMUX(11, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(11, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(12, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(12, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(13, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(13, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(13, 2, 1)>,
    +                                <RZG2L_PORT_PINMUX(14, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(7, 2, 1)>,
    +                                <RZG2L_PORT_PINMUX(8, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(8, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(8, 2, 1)>,
    +                                <RZG2L_PORT_PINMUX(9, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(9, 1, 1)>,
    +                                <RZG2L_PORT_PINMUX(10, 0, 1)>,
    +                                <RZG2L_PORT_PINMUX(10, 1, 1)>;
    +               };
    +
    +               sync {
    +                       pinmux = <RZG2L_PORT_PINMUX(6, 1, 1)>, /* HSYNC */
    +                                <RZG2L_PORT_PINMUX(7, 0, 1)>; /* VSYNC */
    +               };
    +
    +               de {
    +                       pinmux = <RZG2L_PORT_PINMUX(7, 1, 1)>; /* DE */
    +               };
    +
    +               clk {
    +                       pinmux = <RZG2L_PORT_PINMUX(6, 0, 1)>; /* CLK */
    +               };
    +       };
    +};
    +
    +&dsi0 {
    +       status = "disabled";
    +};
    +
    +&adv7535 {
    +       status = "disabled";
    +};
    +
    +&du {
    +       pinctrl-0 = <&du_pins>;
    +       pinctrl-names = "default";
    +       status = "okay";
    +
    +       ports {
    +               port@0 {
    +                       du_out_rgb: endpoint {
    +                                               remote-endpoint = <&panel_in_rgb>;
    +                       };
    +               };
    +       };
    +};
    +
    +&adc {
    +        status = "disabled";
     };
    

    If you use "compatible = "giantplus,gpm940b0"", please comment out the "panel-dpi" and its timing in devicetree and update the panel-simple.c driver with below diff:

    diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
    index 35a3ceae9424..1588506d43f2 100644
    --- a/drivers/gpu/drm/panel/panel-simple.c
    +++ b/drivers/gpu/drm/panel/panel-simple.c
    @@ -1965,22 +1965,22 @@ static const struct panel_desc giantplus_gpg482739qs5 = {
            .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
     };
    
    -static const struct display_timing giantplus_gpm940b0_timing = {
    -       .pixelclock = { 13500000, 27000000, 27500000 },
    -       .hactive = { 320, 320, 320 },
    -       .hfront_porch = { 14, 686, 718 },
    -       .hback_porch = { 50, 70, 255 },
    -       .hsync_len = { 1, 1, 1 },
    -       .vactive = { 240, 240, 240 },
    -       .vfront_porch = { 1, 1, 179 },
    -       .vback_porch = { 1, 21, 31 },
    -       .vsync_len = { 1, 1, 6 },
    -       .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
    +static const struct drm_display_mode giantplus_gpm940b0_mode = {
    +        .clock          = 9000,
    +        .hdisplay       = 480,
    +        .hsync_start    = 480 + 8,
    +        .hsync_end      = 480 + 8 + 43,
    +        .htotal         = 800 + 8 + 43 + 41,
    +        .vdisplay       = 272,
    +        .vsync_start    = 272 + 4,
    +        .vsync_end      = 272 + 4 + 21,
    +        .vtotal         = 272 + 4 + 21 + 10,
    +        .flags          = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
     };
    
     static const struct panel_desc giantplus_gpm940b0 = {
    -       .timings = &giantplus_gpm940b0_timing,
    -       .num_timings = 1,
    +       .modes = &giantplus_gpm940b0_mode,
    +       .num_modes = 1,
            .bpc = 8,
            .size = {
                    .width = 60,
    

    Also enable "DRM_PANEL_SIMPLE" config:

    diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
    index 938efecc8d54..3d06c27d3eaf 100644
    --- a/arch/arm64/configs/defconfig
    +++ b/arch/arm64/configs/defconfig
    @@ -444,3 +444,4 @@ CONFIG_RZV2M_TIM_CNT=y
     CONFIG_COUNTER=y
     CONFIG_RZ_MTU3_CNT=y
     CONFIG_RZ_TIMER_MTU3=y
    +CONFIG_DRM_PANEL_SIMPLE=y
    

  • i have enabled the driver in defconfig but doesnt seems to work driver is not being loaded. What to do about it.

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