RZ/T2M Halt on debug, Global System Counter not working

Question

Hi, 
 I want to halt the Global System Counter for debugging purposes which I enabled in the respective register with the .HDBG bit. 
 However, the status bit .DBGH for monitoring this setting does not change which for me is an indication that it is not working as I intended. 
 I attached a screenshot of the corresponding registers. 
 Can someone help me with this? 
 
 Kind regards.

PT_Renesas · Answer

HI Mike, First of all your query is mostly related to ARM architecture and is not specific to RZ/T2M. Are you interested specifically for the Cortex-R system counter behavior? Please note there are difference between Cortex-A and Cortex-R architectures. Taking as a reference the ARM&reg; Architecture Reference Manual ARMv7-A and ARMv7-R: 
 The DBGDSCR (Debug Status and Control Register) and DBGPRCR (Debug Power Control Register) are critical for configuring debug behavior in ARM Cortex-R processors, including the handling of CPU halt states, external debug access, and peripheral behavior during debugging. Kind Regards.