We are currently working on the bring-up of our custom board based on the RZ/G2L processor (R9A07G044L23GBG), and we have followed the RZ/G2L EVK as our reference design.
The EVK uses Micron’s MT40A1G16KD-062E:IT:F DDR4, but as this part is now obsolete, we have replaced it with MT40A1G16TD-062E:AAT:F (same capacity: 1Gb x16, different revision). The rest of the design, including power rails and layout, remains consistent with the EVK.
We are using the SCIF Download mode with the Renesas Flash Writer tool to test and flash the board. We successfully generated the .mot file, and it gets downloaded to system memory via serial interface. The code starts executing correctly, but it gets stuck during the DDR setup process.
.mot
On debugging, we observed the following:
ddr_setup()
main.c
exec_trainingWRLVL(uint32_t sl_lanes)
panic()
We believe this failure might be related to DDR configuration mismatch, possibly due to the change in DDR part number.
To resolve this, we kindly request:
Hi vinod,Do you use the default Flash Writer executable generated for RZ/G2L SMARC EVK?How do you build the Flash Writer?Kind Regards.
Flash_Writer_SCIF_RZG2L_SMARC_PMIC_DDR4_2GB_1PCS.mot, which is built for the RZ/G2L SMARC EVK. However, this did not work on our custom board, as we did not receive any prompt after uploading the file via SCIF. The execution appears to halt during DDR initialization.
Flash_Writer_SCIF_RZG2L_SMARC_PMIC_DDR4_2GB_1PCS.mot
We then rebuilt the Flash Writer using param_mc.c and param_swizzle.c files generated using the RZG2L_G2UL_Five_A3UL_DDR_config_generation_tool_v3.0 Excel workbook following this procedure- https://confluence.renesas.com/display/REN/RZ+BSP+Porting+-+Flash+Writer .Since our board uses MT40A1G16TD-062E:AAT:F, and this part number is not listed in the tool, we proceeded with the configuration used for MT40A1G16KD-062E, which is the DDR part used in the EVK.
param_mc.c
param_swizzle.c
Despite this, the result was the same — the Flash Writer loads but halts during DDR training in ddr_setup(), specifically at Step 24 inside exec_trainingWRLVL(), entering panic().
exec_trainingWRLVL()
Could you please confirm whether the configuration used for MT40A1G16KD-062E is expected to work with MT40A1G16TD-062E:AAT:F, or are we missing any configuration changes, initialization steps, or settings specific to the TD variant? Also, would the default EVK Flash Writer (Flash_Writer_SCIF_RZG2L_SMARC_PMIC_DDR4_2GB_1PCS.mot) normally work with this DDR, or is a custom build required for compatibility?
Looking forward to your guidance.