SerDes Quad associated with Port Number - legacy IDT part number 89H48H12G2ZCBLGI

The device’s user manual says the device has quads numbered 0 to 11 and that the quad is normally aligned with port number.  This statement is under the title "SerDes Numbering and Port Association" on page 113 of user manual.

However, this device skips ports 10 and 11 on Fig 4.1 on page 61.  So the question is:

 

What SerDes quad is associated with Port 12 and 13?

Regards,

Quynh

Parents
  • Cold and Hot Ramp failure (same 89H48H12G2ZCBLGI device):

    Questions:

    1. Should transitions from L1 perform the same SerDes recalibration as L0s to ‘resolve’ the ramping issue?
    2. Is there any reasonable way outside of a protocol analyzer to debug what is failing with L1 enabled?
      1. This link is completely on card and failure happens in a thermal chamber. We don’t have a protocol analyzer to support this.
    3. Are there any device settings that could be modified to improve the training or robustness when transitions from L1 to L0?
      1. Would increasing latency timers or other help? Which ones?
Reply
  • Cold and Hot Ramp failure (same 89H48H12G2ZCBLGI device):

    Questions:

    1. Should transitions from L1 perform the same SerDes recalibration as L0s to ‘resolve’ the ramping issue?
    2. Is there any reasonable way outside of a protocol analyzer to debug what is failing with L1 enabled?
      1. This link is completely on card and failure happens in a thermal chamber. We don’t have a protocol analyzer to support this.
    3. Are there any device settings that could be modified to improve the training or robustness when transitions from L1 to L0?
      1. Would increasing latency timers or other help? Which ones?
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