Reset using certified STL for RL78-GE

Question

We are using R01AN0749EG0201- VDE Certified IEC60730 60335 Self Test Library in our RL78G13. 
 We are now implementing the march_x to check all the RAM in several steps. 
 After checking the 0xFFEA1U a reset is generated due to a RAM parity error. 
 Implemented source code: 
 #define RAM_TEST_START (0xFF788U) 
 #define RAM_TEST_END (0xFFEDFU) 
 
 #pragma dataseg=RAM_TEST_DATA 
 /* Variable definitions used for RAM Test modules */ 
 __no_init uint8_t g_data_backup; 
 __no_init uint8_t *g_pMX_StAdr; 
 __no_init uint16_t g_RAM_MarchX_lgth; 
 #pragma dataseg=default 
 
 g_RAM_MarchX_lgth = 1U; /* Set RAM end address (length + 1) */ 
 
 if ((g_pMX_StAdr > (uint8_t *) RAM_TEST_END) || 
 (g_pMX_StAdr < (uint8_t *)RAM_TEST_START)) 
 { 
 g_pMX_StAdr = (uint8_t *)&RAM_TEST_START; 
 } 
 else 
 { 
 /* Execute March X test */ 
 __disable_interrupt(); 
 /* Save the content of the location to be tested */ 
 g_data_backup = *g_pMX_StAdr; 
 g_resultBool = stl_RL78_march_x(g_RAM_MarchX_lgth, g_pMX_StAdr); 
 /* Restore the content of the tested location */ 
 *g_pMX_StAdr = g_data_backup; 
 __enable_interrupt(); 
 g_pMX_StAdr ++; 
 } 
 Thank you for your help. 
 Best regards,

Mike Clodfelter · Accepted Answer

Hello Electra, 
 It is OK to have some __no_init RAM sections in your code. However, you must always first write to a RAM location before reading that RAM location. 
 I think there is some place in your code that is Reading a RAM location that has not been written yet. 
 Writing to a RAM location sets the RAM Parity to the correct value. But on RL78 MCU power-ON RESET the values of RAM bits and Parity Bit for each byte is random, and has a 50% chance of having the wrong parity bit value. Then reading any RAM location with wrong parity value will result in MCU RESET. 
 So please write to RAM locations before reading them. 
 During DEBUG process, you can turn off RAM PARITY Error RESET function by issuing this code: 
 RPERDIS = 1u; 
 This is OK during DEBUG, but not recommended for final SW code version, since you want to always catch RAM errors. (normally should have RPERDIS = 0u;) 
 Renesas has thoroughly tested the R01AN0749EG0201- VDE Certified IEC60730 60335 Self Test Library, and it was verified working correctly. Therefore I think the RAM READ before WRITE is in your code. 
 Regards, 
 Mike 
 Renesas applications engineer

electra · Answer

Hello Mike, 
 Thank you very much for your answer. 
 It's been really helpful. 
 I have turned off the parity error check during march test and no more resets 
 I don't know witch is the best way to guarantee that the entire RAM has been written before using the March test. 
 For the moment I'm going to write RPERDIS = 1 during the March test. 
 About renesas certified STL It’s really well optimized and easy to use, a great aid for us. 
 It has been my first time in the forum and I didn't know how it worked very well.