In my design, I'm using a 19.2MHz crystal and outputting a variety of clocks at 1.8V. I don't have a lot of choice of the 19.2MHz--it's required by the CPU I'm clocking on OUT0.
A 19.2MHz crystal requires reprogramming the feedback divider from defaults to keep the VCO within limits (and if you don't do this, the frequency will skew with time and temperature and the math for computing a specific output frequency is not at all correct). Committing the new feedback divider seems to require triggering "calibration_start" (register 0x1c, bit D7). This causes OUT0 to drop out while calibration is running. As I'm using OUT0 to clock the CPU which is sending I2C commands to do the recalibration, the dropout will actually cause the CPU to hang until a power cycle.
The oscilloscope showing this dropout on OUT0 after triggering calibration_start.
1) Is there any way to prevent the dropout on OUT0 and still correct the feedback divider?
Assuming I must OTP program to avoid this... Step 1 of OTP Programming says "Connect all VDD pins to a single 3.3V".
2) Is 3.3V actually necessary to program? VDDD/VDDA and all VDDOs in my design are 1.8V.
3) Is it possible to just run 3.3V to VDDA/VDDD instead of "all VDD pins"? I do not want to run 3.3V to the VDDO clock outputs which are connected to inputs that can only take 1.8V.
4) Is there a test fixture I can purchase to program these devices before placing them in-circuit? I know you have a custom service, but I use this chip for a wide variety of designs and do not want them all pre-programmed for just one project.
Thanks in advance!