5P49V6965 buffer CLKIN to OUT1

Question

Hi, 
 We have a custom board where we use a 5P49V6965 to generate HDMI tmds clock. We either synthesize a frequency from the vco fed by xtal reference, or we need to buffer clkin to out1. With the latter use case, we experience issues with some ICs, where we don't get a clock at all. Even though the pll/vco path isn't used when buffering clkin to out1, we can get the output clock to recover by re-calibrating the vco. -> Can you please explain in detail what the conditions are in which the output is muted? -> Is there a way to buffer the clock from clkin to out1 without having the calibrate the vco? Having to do so seems unnecessary and I would expect there to be a way to override the logic that mutes the clock. 
 Is it possible that ICs with different date codes have different conditions for muting the clock? Best regards, Bart Van Severen

Michael Quirk · Accepted Answer

if using CLKIN/CLKIN_B, they can have the correct signal at OUT1/OU1B by triggering VCO recalibration (setting register 0x1C from 0x1F to 0x9F).

5P49V6965 buffer CLKIN to OUT1

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