5P1105 - should RAM register changes take affect immediately?

Question

I'm working on a 5P1105ALL-EVB. 
 Timing commander cannot see any connection to the board. I think the FTDI drivers are ok, because 2 COM ports appear upon plugging in the board, but TC says it can't find any device when using either address 0xD4 (from the datasheet), or 0x6A (the equivalent 7 bit address). 
 I connected a Raspberry Pi to it via I2C and the AARDVARK connector, and it can see and manipulate the registers of the 5P1105, so the inability of Timing Commander to connect is an inconvenience rather than a fatal problem. 
 On to my immediate question: should changes to registers that define the clock outputs have an immediate affect? Or are the outputs set only on power up? 
 The default configuration on the board generates a CMOS signal and its inverse on CLK1, HCSL3 on CLK2, LVDS on CLK3 and LVPECL on CLK4. 
 I set 0x62, 0x64 and 0x66 to 0xBB to generate a CMOSD output in CLK2, CLK3 and CLK4, but I saw no change in the outputs. I tried toggling the SD/OE pin, but that didn't help. Do I have to shut it down, as detailed in the "Entering Shutdown Mode through I2C" section of the Register Descriptions and Programming Guide? 
 By the way, I have doubts about the accuracy of those instructions for entering shutdown mode because it appears the instructions in steps 1 and 2 are mixed up. Step 1 says to write 001ss000 to tristate the outputs, but that just sets it to single-ended CMOS. Step 2 says to set the outputs to single-ended CMOS by writing 0x00 to register 0x68, but it appears that would tristate the outputs. Step 4 then says to set a special value in an undocumented registers to disable otherwise-unmentioned dividers. It does not instill confidence.

Michael Quirk · Answer

From Our Engineering Team: 
 Here are my comments and my recommendations in green . 
 Timing commander cannot see any connection to the board. I think the FTDI drivers are ok, because 2 COM ports appear upon plugging in the board, but TC says it can't find any device when using either address 0xD4 (from the datasheet), or 0x6A (the equivalent 7 bit address). 
 [ CM] It&rsquo;s weird, please could you check the R65/R66/R27/R28 resistors are correctly mounted and with good indicated values in the evb user guide. 
 
 [CM] Check the I2C signals when the FTDI drives lines, the two signals should be toggling. 
 
 [CM] Could you confirm the OUT0_SETB_I2C pin is set to 0 during the power up. 
 I assume it&rsquo;s the case, otherwise the parts won&rsquo;t connect with AARDVARK. 
 
 [CM] Could you read the 0x00 register with the aardvark probe. The bit[0] should be 1, if I2C address is 0xD4. 
 On to my immediate question: should changes to registers that define the clock outputs have an immediate affect? Or are the outputs set only on power up? 
 [CM] It depends of register, for certain registers, you couldn&rsquo;t notice any immediate changes. 
 I suggest toggling the following Shutdown/OE registers, you should observe changes on the outputs.

The default configuration on the board generates a CMOS signal and its inverse on CLK1, HCSL3 on CLK2, LVDS on CLK3 and LVPECL on CLK4. 
 I set 0x62, 0x64 and 0x66 to 0xBB to generate a CMOSD output in CLK2, CLK3 and CLK4, but I saw no change in the outputs. I tried toggling the SD/OE pin, but that didn't help. Do I have to shut it down, as detailed in the "Entering Shutdown Mode through I2C" section of the Register Descriptions and Programming Guide? 
 [CM] Normally, that should change. I wonder if the I2C access are valid. 
 By the way, I have doubts about the accuracy of those instructions for entering shutdown mode because it appears the instructions in steps 1 and 2 are mixed up. Step 1 says to write 001ss000 to tristate the outputs, but that just sets it to single-ended CMOS. Step 2 says to set the outputs to single-ended CMOS by writing 0x00 to register 0x68, but it appears that would tristate the outputs. Step 4 then says to set a special value in an undocumented registers to disable otherwise-unmentioned dividers. It does not instill confidence. 
 [CM] Here is the attached programming guide, see the Figure 2. Shutdown Logic. 
 REN_5P11xx-RegDesc-Program-Guide_GDE_20170811.pdf