Hello I am working with the 5P49V6965 on a custom devboard as well as the 5P49V6965-EVB.
I am having trouble getting any of the outputs to have more than 110 degrees phase shift from each other.The Timing Commander software allows me to set higher values but after 110 degrees the actual values at the output are no longer accurate.
I also tried doing my own calculation based on the "Register Descriptions and Programming Guide" which produced the same values as the Timing Commander software.Confusingly, the values calculated in the data sheet don't seem to be correct? (2 ^ 6) = ***. *** * 0.82 = 52.48, 52 = 34 (hex)The following is my configuration on the EVB generated by the Timing Commander software.
MasonM,
We have duplicated your issue and are currently digging into finding a solution for you.
We have found that it seems there is unexpected phase shift happens when 0x5B[6] is set to 1.
Hello Michael,I was just curious if any headway has been made on a solution to this issue?Thank you!-Mason
I just pinged the application engineering team to see if they have found more information out from the design team.
The design team has identified an issue regarding the overflow of a register, where addition of output divider and INT skew must be less than 4096 (due to12-bit register). For 396.4khz, the programmable int skew is 1182, and the output divider value is 3153 (the value of N in the formula). Therefore, 3153+1182 is causing an overflow. If you try 450khz, the programmable int skew is around 1042 and output divider is 2777, their addition is around 3819, which is in expected range so we can see accurate skew. Design team requires more time to analyze different scenarios, I will get back to you once I receive any additional update.
450khz – 135 Degree Skew
The design team has informed us to raise warning in Timing Commander if the integer skew part exceeds 11 bits. This will ensure that we have 360 degree skew and it would not cause an overflow. We will update programming guide and TC personality based on this information.
Does the you have any other questions?
Am I correct in understanding that there is no way to produce 135 degrees of phase shift on a 396.4KHz output with a 25MHz crystal input? Our design utilizes an 18.432MHz crystal, but It appears a similar constraint would still be present.
Yes, you’re right based on design team suggestion we will overflow register. But thanks to a member of the engineer team : provided temporary solution. By programming OD4 integer value to 2112(R0x5B = 0x84, R0x5C =0) for 396.4kHz. We got phase shift around ~135 degree with output 1 as the reference, you can try this work around solution.