RX GCC linker bug

I'm experiencing the problem mentioned in the FAQ number 3000668:

Program Built with --gc-sections Option Does Not Run in GCC Project | Renesas Customer Hub

This bug is easily reproducible just by creating a new GCC project for the microcontroller R5F5671EHxFB with C++ and FreeRTOS.

By default, the compiler option --gc-sections is beeing enabled. If you disable it, the code works as expected.

The program is breaking inside 'vTaskStartScheduler', when it tries to call some static privileged fuctions.

I've tried to add KEEP to the .ctors and .dtors sections in the linker file  as mentioned here: 8.3.7 Gc-sections Option (microchip.com), but it does not solve the problem. There must be something else missconfigured.

I do not want to disable this option, because it reduces the size of the final binary file.

Can you check what's the cause of the failure?

  • Can anyone from the renesas team check this problem?

    You just have to take the 'Renesas Starter Kit+ for RX671' and create a new project (GCC, C++ and FreeRTOS) in order to reproduce it with the lastest versions.

  • Hi vquirana,

    Thanks for your question and apologies for the late response. We also received your ticket on our private ticketed system as well.

    We are working on that so will revert back to you as fast as we can.

    BR,

    PM_Renesas

  • KEEP directive with ctors/dtors, init_array and vector tables are commonly seen in GCC projects and you should know why.
    cf. https://blog.thea.codes/the-most-thoroughly-commented-linker-script/
    Also see this FAQ:
    https://en-support.renesas.com/knowledgeBase/20746269

  • Hi Okra, thanks for replying.

    I understand the functionality of the 'KEEP' keyword, I've spent some time reading documentation about it.

    The problem is that I can reproduce this issue, with an empty project (created from a template with e2 studio), and an auto-generated linker script.

    I haven't managed to solve it on my own, and that's why I'm requesting some help.

    This is the linker script, in case you have any clue about the failure:

    MEMORY
    {
    	RAM : ORIGIN = 0x4, LENGTH = 0x5fffc
    	ROM : ORIGIN = 0xFFE00000, LENGTH = 2097152
    	OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128
    }
    SECTIONS
    {
    	.exvectors 0xFFFFFF80: AT(0xFFFFFF80)
    	{
    		"_exvectors_start" = .;
    		KEEP(*(.exvectors))
    	"_exvectors_end" = .;
    	} >ROM
    	.fvectors 0xFFFFFFFC: AT(0xFFFFFFFC)
    	{
    		KEEP(*(.fvectors))
    	} > ROM
    	.text 0xFFE00000: AT(0xFFE00000)
    	{
    		*(.text)
    		*(.text.*)
    		*(P)
    		etext = .;
    	} > ROM
    	.rvectors ALIGN(4):
    	{
    		_rvectors_start = .;
    		INCLUDE ../src/smc_gen/r_bsp/mcu/all/linker_script_rvectors.inc
    		_rvectors_end = .;
    	} > ROM
    	.init :
    	{
    		KEEP(*(.init))
    		__preinit_array_start = .;
    		KEEP(*(.preinit_array))
    		__preinit_array_end = .;
    		__init_array_start = (. + 3) & ~ 3;
    		KEEP(*(.init_array))
    		KEEP(*(SORT(.init_array.*)))
    		__init_array_end = .;
    		__fini_array_start = .;
    		KEEP(*(.fini_array))
    		KEEP(*(SORT(.fini_array.*)))
    		__fini_array_end = .;
    	} > ROM
    	.fini :
    	{
    		KEEP(*(.fini))
    	} > ROM
    	.got :
    	{
    		*(.got)
    		*(.got.plt)
    	} > ROM
    	.rodata :
    	{
    		*(.rodata)
    		*(.rodata.*)
    		*(C_1)
    		*(C_2)
    		*(C)
    		_erodata = .;
    	} > ROM
    	gcc_exceptions_table :
    	{
    	    KEEP (*(.gcc_except_table))
    	    *(.gcc_except_table.*)
    	} > ROM
    	.eh_frame_hdr :
    	{
    		*(.eh_frame_hdr)
    	} > ROM
    	.eh_frame :
    	{
    		*(.eh_frame)
    	} > ROM
    	.jcr :
    	{
    		*(.jcr)
    	} > ROM
    	.tors :
    	{
    		__CTOR_LIST__ = .;
    		. = ALIGN(2);
    		___ctors = .;
    		*(.ctors)
    		___ctors_end = .;
    		__CTOR_END__ = .;
    		__DTOR_LIST__ = .;
    		___dtors = .;
    		*(.dtors)
    		___dtors_end = .;
    		__DTOR_END__ = .;
    		. = ALIGN(2);
    		_mdata = .;
    	} > ROM
    	.data : AT(_mdata)
    	{
    		_data = .;
    		*(.data)
    		*(.data.*)
    		*(D)
    		*(D_1)
    		*(D_2)
    		_edata = .;
    	} > RAM
    	.bss :
    	{
    		_bss = .;
    		*(.bss)
    		*(.bss.**)
    		*(COMMON)
    		*(B)
    		*(B_1)
    		*(B_2)
    		_ebss = .;
    		. = ALIGN(128);
    		_end = .;
    	} > RAM AT>RAM
    	.ofs1 0xFE7F5D00: AT(0xFE7F5D00)
    	{
    		KEEP(*(.ofs1))
    	} > OFS
    	.ofs2 0xFE7F5D10: AT(0xFE7F5D10)
    	{
    		KEEP(*(.ofs2))
    	} > OFS
    	.ofs3 0xFE7F5D20: AT(0xFE7F5D20)
    	{
    		KEEP(*(.ofs3))
    	} > OFS
    	.ofs4 0xFE7F5D40: AT(0xFE7F5D40)
    	{
    		KEEP(*(.ofs4))
    	} > OFS
    	.ofs5 0xFE7F5D48: AT(0xFE7F5D48)
    	{
    		KEEP(*(.ofs5))
    	} > OFS
    	.ofs6 0xFE7F5D50: AT(0xFE7F5D50)
    	{
    		KEEP(*(.ofs6))
    	} > OFS
    	.ofs7 0xFE7F5D64: AT(0xFE7F5D64)
    	{
    		KEEP(*(.ofs7))
    	} > OFS
    	.ofs8 0xFE7F5D70: AT(0xFE7F5D70)
    	{
    		KEEP(*(.ofs8))
    	} > OFS
    .r_bsp_NULL :
    	{
    		. += 0x100;
    		"_r_bsp_NULL_end" = .;
    	} >RAM AT>RAM
    .r_bsp_istack ALIGN(0x4) (NOLOAD) :
    	{
    		KEEP(*(.r_bsp_istack))
    	} >RAM AT>RAM
    .istack :
    	{
    		"_istack" = .;
    	} >RAM
    .r_bsp_ustack ALIGN(0x4) (NOLOAD) :
    	{
    		KEEP(*(.r_bsp_ustack))
    	} >RAM AT>RAM
    .ustack :
    	{
    		"_ustack" = .;
    	} >RAM
    }
    

    Regards,

    Viviana

    PS: I've already read that Renesas FAQ, just check the second line of my post.

  • OK, understood your situation.

  • Hi Viviana,

    Looking at the linker script, your issues is at line 29.


    .rvectors ALIGN(4):
    {
    _rvectors_start = .;
    INCLUDE ../src/smc_gen/r_bsp/mcu/all/linker_script_rvectors.inc <------ this gets removed with --gc-sections
    _rvectors_end = .;
    } > ROM

    It looks like you created a e2 studio project with the Smart Configurator (SC) enabled.

    If you create a project without SC the same line of code will look like (which has no issue when using --gc-sections):

    .rvectors ALIGN(4):
    {
    _rvectors_start = .;
    KEEP(*(.rvectors))
    _rvectors_end = .;
    } > ROM

    You can verify this by checking the map file.

    In case you need to continue with the SC project I have the following workaround for you:

    https://llvm-gcc-renesas.com/wiki/index.php?title=RX_automatic_interrupt_vector_entry_usage

    I will also inform the SC about this.

  • For future reference I also recommend using https://llvm-gcc-renesas.com for compiler issues.  

  • Hi SebP,

    Thanks for your help.

    I will try the workaround later, because just replacing those those lines didn't work.

    By the way, Smart Configurator is checked by default with the project creation tool and you can't disable it. 

  • Hi again,

    I can confirm the workaroud works. Thanks for your suggestion!

    I also will tell the support team in my private ticket.

    If anyone can find this helpful, this is the content of the int-guard.s file:

    .section .intvecguard
    .weak $tableentry$0$.rvectors
    .word $tableentry$0$.rvectors
    .weak $tableentry$1$.rvectors
    .word $tableentry$1$.rvectors
    .weak $tableentry$2$.rvectors
    .word $tableentry$2$.rvectors
    .weak $tableentry$3$.rvectors
    .word $tableentry$3$.rvectors
    .weak $tableentry$4$.rvectors
    .word $tableentry$4$.rvectors
    .weak $tableentry$5$.rvectors
    .word $tableentry$5$.rvectors
    .weak $tableentry$6$.rvectors
    .word $tableentry$6$.rvectors
    .weak $tableentry$7$.rvectors
    .word $tableentry$7$.rvectors
    .weak $tableentry$8$.rvectors
    .word $tableentry$8$.rvectors
    .weak $tableentry$9$.rvectors
    .word $tableentry$9$.rvectors
    .weak $tableentry$10$.rvectors
    .word $tableentry$10$.rvectors
    .weak $tableentry$11$.rvectors
    .word $tableentry$11$.rvectors
    .weak $tableentry$12$.rvectors
    .word $tableentry$12$.rvectors
    .weak $tableentry$13$.rvectors
    .word $tableentry$13$.rvectors
    .weak $tableentry$14$.rvectors
    .word $tableentry$14$.rvectors
    .weak $tableentry$15$.rvectors
    .word $tableentry$15$.rvectors
    .weak $tableentry$16$.rvectors
    .word $tableentry$16$.rvectors
    .weak $tableentry$17$.rvectors
    .word $tableentry$17$.rvectors
    .weak $tableentry$18$.rvectors
    .word $tableentry$18$.rvectors
    .weak $tableentry$19$.rvectors
    .word $tableentry$19$.rvectors
    .weak $tableentry$20$.rvectors
    .word $tableentry$20$.rvectors
    .weak $tableentry$21$.rvectors
    .word $tableentry$21$.rvectors
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    .weak $tableentry$23$.rvectors
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    .weak $tableentry$24$.rvectors
    .word $tableentry$24$.rvectors
    .weak $tableentry$25$.rvectors
    .word $tableentry$25$.rvectors
    .weak $tableentry$26$.rvectors
    .word $tableentry$26$.rvectors
    .weak $tableentry$27$.rvectors
    .word $tableentry$27$.rvectors
    .weak $tableentry$28$.rvectors
    .word $tableentry$28$.rvectors
    .weak $tableentry$29$.rvectors
    .word $tableentry$29$.rvectors
    .weak $tableentry$30$.rvectors
    .word $tableentry$30$.rvectors
    .weak $tableentry$31$.rvectors
    .word $tableentry$31$.rvectors
    .weak $tableentry$32$.rvectors
    .word $tableentry$32$.rvectors
    .weak $tableentry$33$.rvectors
    .word $tableentry$33$.rvectors
    .weak $tableentry$34$.rvectors
    .word $tableentry$34$.rvectors
    .weak $tableentry$35$.rvectors
    .word $tableentry$35$.rvectors
    .weak $tableentry$36$.rvectors
    .word $tableentry$36$.rvectors
    .weak $tableentry$37$.rvectors
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    .weak $tableentry$38$.rvectors
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    .weak $tableentry$46$.rvectors
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    Regards,

    Viviana