Failing to Flash on Custom Board

Hi There,

Thank you for posting your question online.
Are you following this guide here in order to program your custom board via the Development Kit Pro?

Regarding the Schematic you shared:
Your Bypass configuration seems correct.

We would have to recommend exposing P0_5 and P0_0 (RST) on J2 header (Debugging) so you are able to perform 1-Wire UART if necessary. I can see that you have correctly assigned P0_2 and P0_10 as your SWD interface, but you have named P0_2 as ADC1 as well.
Are you going to use P0_2 inside your project? If yes, keep in mind that you will have to disable the debugger and in case your application crashes you will have to use 1-Wire UART to recover the board.
I can see that you are using the W25X20C SPI Flash which is supported for the DA145xx series. 

Also, I can see that you have declared the correct pins for the SPI Flash, and you are going to use Boot 5 for the Booting Process


Have you programmed the board before? Could you try via the SmartSnippets Toolbox and share the logs?

Kind Regards,
OV_Renesas

Thanks for the reply OV_Renesas.

I am not using ADC in my design or code at all. I did a search in the user_central_app.c, user_periph_setup.c & h files but could not find any reference to them. The pins P0_2 & P0_10 will only be used for loading firmware and no other things.

Regarding the guide, i am following all the wiring instructions as stated except the voltage since its optional. I have it connected to my Power Supply which powers the custom board.

I am also attaching the log i get from SmartSnippets Toolbox when i go to board and detect device. It tells me no devices were detected. I have used the same firmware that I am trying to load onto this board on the daughter board and it was working fine for me.

[INFO     General@23-05-31 21:55:26] Found SW-DP with ID 0x0BC11477
[INFO     General@23-05-31 21:55:26] Scanning AP map to find all available APs
[INFO     General@23-05-31 21:55:26] AP[1]: Stopped AP scan as end of AP map has been reached
[INFO     General@23-05-31 21:55:26] AP[0]: AHB-AP (IDR: 0x04770031)
[INFO     General@23-05-31 21:55:26] Iterating through AP map to find AHB-AP to use
[INFO     General@23-05-31 21:55:26] AP[0]: Core found
[INFO     General@23-05-31 21:55:26] AP[0]: AHB-AP ROM base: 0xE00FF000
[INFO     General@23-05-31 21:55:26] CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
[INFO     General@23-05-31 21:55:26] Found Cortex-M0 r0p1, Little endian.
[INFO     General@23-05-31 21:55:26] FPUnit: 4 code (BP) slots and 0 literal slots
[INFO     General@23-05-31 21:55:26] CoreSight components:
[INFO     General@23-05-31 21:55:26] ROMTbl[0] @ E00FF000
[INFO     General@23-05-31 21:55:26] ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS
[INFO     General@23-05-31 21:55:26] ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT
[INFO     General@23-05-31 21:55:26] ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB
[INFO     General@23-05-31 21:55:26] BTLE device selected.

Hi There,

Thank you for the reply.

Audi said:

I am not using ADC in my design or code at all. I did a search in the user_central_app.c, user_periph_setup.c & h files but could not find any reference to them. The pins P0_2 & P0_10 will only be used for loading firmware and no other things.

Ok, that sounds good. You should still expose P0_5 and P0_0( already exposed) so you can perform 1-Wire UART because if you have implemented any sleep mode (debugger is disabled) and your application crash you will not be able to access the board via the SWD interface.

Audi said:

Also which one is the P0_5 that needs to be exposed as I know where the RST is and have it already exposed.

As far I can see, P0_5 is not connected to anything in your schematic.

Audi said:

Regarding the guide, i am following all the wiring instructions as stated except the voltage since its optional. I have it connected to my Power Supply which powers the custom board.

Could you please try to power your custom board from the Development Kit Pro? 

From the SST logs you shared I can see that you should be able to detect your device. 
If though it says  No Device has been detected, please go on the Board tab:

Select DA14531 as your Device and the JTAG number that will show up. 
Then go on the Programmer tab-->RAM and try to load your FW into the RAM. 
Please share the logs when you try to download FW into the RAM. 


Kind Regards,
OV_Renesas

I am not sure how I can expose the P0_5 since i was not used in the design there are no traces leading to P0_5 to expose.

I followed your instructions on loading the FW into RAM here is the output log. Even though it says successfully downloaded image file to board it has no functionality of the FW.

[INFO     General@23-06-01 12:00:11] Found SW-DP with ID 0x0BC11477
[INFO     General@23-06-01 12:00:11] Scanning AP map to find all available APs
[INFO     General@23-06-01 12:00:11] AP[1]: Stopped AP scan as end of AP map has been reached
[INFO     General@23-06-01 12:00:11] AP[0]: AHB-AP (IDR: 0x04770031)
[INFO     General@23-06-01 12:00:11] Iterating through AP map to find AHB-AP to use
[INFO     General@23-06-01 12:00:11] AP[0]: Core found
[INFO     General@23-06-01 12:00:11] AP[0]: AHB-AP ROM base: 0xE00FF000
[INFO     General@23-06-01 12:00:11] CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
[INFO     General@23-06-01 12:00:11] Found Cortex-M0 r0p1, Little endian.
[INFO     General@23-06-01 12:00:11] FPUnit: 4 code (BP) slots and 0 literal slots
[INFO     General@23-06-01 12:00:12] CoreSight components:
[INFO     General@23-06-01 12:00:12] ROMTbl[0] @ E00FF000
[INFO     General@23-06-01 12:00:12] ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS
[INFO     General@23-06-01 12:00:12] ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT
[INFO     General@23-06-01 12:00:12] ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB
[INFO     General@23-06-01 12:00:12] BTLE device selected.
[INFO     RAM@23-06-01 12:00:57] Found SW-DP with ID 0x0BC11477
[INFO     RAM@23-06-01 12:00:57] AP map detection skipped. Manually configured AP map found.
[INFO     RAM@23-06-01 12:00:57] AP[0]: AHB-AP (IDR: Not set)
[INFO     RAM@23-06-01 12:00:57] AP[0]: Core found
[INFO     RAM@23-06-01 12:00:57] AP[0]: AHB-AP ROM base: 0xE00FF000
[INFO     RAM@23-06-01 12:00:57] CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
[INFO     RAM@23-06-01 12:00:57] Found Cortex-M0 r0p1, Little endian.
[INFO     RAM@23-06-01 12:00:57] FPUnit: 4 code (BP) slots and 0 literal slots
[INFO     RAM@23-06-01 12:00:57] CoreSight components:
[INFO     RAM@23-06-01 12:00:57] ROMTbl[0] @ E00FF000
[INFO     RAM@23-06-01 12:00:57] ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS
[INFO     RAM@23-06-01 12:00:57] ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT
[INFO     RAM@23-06-01 12:00:57] ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB
[INFO     RAM@23-06-01 12:00:57] Reset: Halt core after reset via DEMCR.VC_CORERESET.
[INFO     RAM@23-06-01 12:00:57] Reset: Reset device via AIRCR.SYSRESETREQ.
[INFO     RAM@23-06-01 12:00:58] Firmware File C:\Users\yudik\Desktop\DA145xx_SDK\6.0.18.1182.1\projects\BLE_SDK6_examples-main\connectivity\central\project_environment\out_DA14531\Objects\central_531.bin has been selected for downloading.
[INFO     RAM@23-06-01 12:00:58] Reset: Halt core after reset via DEMCR.VC_CORERESET.
[INFO     RAM@23-06-01 12:00:58] Reset: Reset device via AIRCR.SYSRESETREQ.
[INFO     RAM@23-06-01 12:00:58] Reset: Halt core after reset via DEMCR.VC_CORERESET.
[INFO     RAM@23-06-01 12:00:58] Reset: Reset device via AIRCR.SYSRESETREQ.
[INFO     RAM@23-06-01 12:00:58] Successfully downloaded Image file to the board.

Note: Since it said FW flashed successfully to RAM i tried flashing a FW that just turns on the LED but unfortunately even when it said Image downloaded successfully the LED did not have any power coming to it from P0_9.

Hi There,

Thank you for the reply.
Could you try to load the ble_app_barebone example into the RAM and see if the device actually advertises? 
It is weird that you are able to download the FW into the SRAM but the FW is not working.

Audi said:

I am not sure how I can expose the P0_5 since i was not used in the design there are no traces leading to P0_5 to expose.

It is not mandatory to expose P0_5, but it would be better having P0_5 exposed as it gives you the possibility for 1-Wire UART programming. 
I am aware that you have raised a private ticket as well (#370747). Would you prefer this conversation to continue on the Private Ticket or in the BLE forum?
From what you have shared on your private ticket I could see that you have not placed the RST jumper on the J1 header of the DevKit Pro. 
Have you tried to power up your board from the Dev Kit Pro?

Kind Regards,
OV_Renesas

I am happy to continue our conversation on the Private Ticket and will be responding to this there.