Good morning,
I am transitioning from the DA14531 USB Dev Kit to a custom prototype board. I was able to correctly configure the Dev Kit for programming per the serial wire debug guide. The custom prototype is now recognized by the Keil IDE and can enter debug mode.
However, when attempting to run the code there is an issue with CPU being halted which I believe is related to the reset line. Log below:
* JLink Info: Memory map 'after startup completion point' is active* JLink Info: CPU could not be halted***JLink Error: Cannot read register 15 (R15) while CPU is running***JLink Error: Cannot read register 16 (XPSR) while CPU is running***JLink Error: Cannot read register 0 (R0) while CPU is running***JLink Error: Cannot read register 1 (R1) while CPU is running***JLink Error: Cannot read register 2 (R2) while CPU is running***JLink Error: Cannot read register 3 (R3) while CPU is running***JLink Error: Cannot read register 4 (R4) while CPU is running***JLink Error: Cannot read register 5 (R5) while CPU is running***JLink Error: Cannot read register 6 (R6) while CPU is running***JLink Error: Cannot read register 7 (R7) while CPU is running***JLink Error: Cannot read register 8 (R8) while CPU is running***JLink Error: Cannot read register 9 (R9) while CPU is running***JLink Error: Cannot read register 10 (R10) while CPU is running***JLink Error: Cannot read register 11 (R11) while CPU is running***JLink Error: Cannot read register 12 (R12) while CPU is running***JLink Error: Cannot read register 13 (R13) while CPU is running***JLink Error: Cannot read register 14 (R14) while CPU is running***JLink Error: Cannot read register 15 (R15) while CPU is running***JLink Error: Cannot read register 16 (XPSR) while CPU is running***JLink Error: Cannot read register 17 (MSP) while CPU is running***JLink Error: Cannot read register 18 (PSP) while CPU is running***JLink Error: Cannot read register 20 (CFBP) while CPU is running
My questions are:
1. Is this error likely due to the reset line being disconnected?
2. How do I connect BOTH the SWDIO pin AND Reset from my custom PCB to the USB dev kit given that the SWDIO connection (per serial wire debug guide) uses the connection labeled as RES on the actual silk layer of the USB dev kit?
*I currently have P0_0 multiplexed with UART_TX and Reset by using a resistor to for the connection. Only UART_TX was connected on the custom PCB.
Hi There,Thank you for posting your question online.I suppose you have followed the procedure shown here: 20. Serial Wire Debug Probe — DA145XX Tutorial SDK Getting started
Nate said:1. Is this error likely due to the reset line being disconnected?
On your Keil project please go on Options for Target and on Utilities make sure you have selected the highlighted option:
Nate said:2. How do I connect BOTH the SWDIO pin AND Reset from my custom PCB to the USB dev kit given that the SWDIO connection (per serial wire debug guide) uses the connection labeled as RES on the actual silk layer of the USB dev kit?
There is no need to connect Reset pin. You only need SWDIO, SWCLK, VBAT and GND.Best Regards,OV_Renesas
Awesome! Thank you so much for your response. I’ll give that a shot when I get back to my computer.
Is it possible to enable UART as well? Does that work with the same DIP Switch configuration as the serial wire debug probe guide?
EDIT: Unfortunately, that was not the issue. The Keil IDE was already correctly configured. After further research, I heard it may be due to clock speed with longer wires for SWDIO/SWCLK but it is set as low as 20 kHz with no luck. I've also confirmed I'm using a 32 MHz crystal oscillator as used by the dev kit. Are there any other common causes for this issue?
Context with other settings below:
Hi Nate,Thank you for the reply.Could you please try to use SmartSnippets Toolbox and download your FW directly into RAM?We would like to verify that the custom board is working properly and then we can see why the debugger cannot be attached.You can get SmartSnippets Toolbox from here: SmartBond Development Tools | RenesasYou can either use SWD or UART programming to download the FW into the SRAm.Best Regards,OV_Renesas
For some reason I am unable to reply to this answer. I have a loading icon at the bottom as shown:
HI Nate,Thank you for the reply.You can try to delete your browser cookies and try again.Did you try to load the FW into the SRAM?Best Regards,OV_Renesas
I have tried attaching the logs as a file in the hopes that it allows the post to go through. I first attempted and failed to download to RAM. Then I realized I should select JTAG from the Board dropdown. It appeared to work. Lastly, I tried flashing the code for further debug information. All logs included.
First attempt to Download firmware to RAM: [ACTION General@25-03-13 20:17:19] Please press the hardware reset button on the board to start the download process. [INFO General@25-03-13 20:17:21] Reset detected [INFO General@25-03-13 20:17:24] UART port "COM6" has been opened. [INFO General@25-03-13 20:17:29] UART port has been released. [INFO Booter@25-03-13 20:18:47] Read 3704 bytes from file C:\Renesas\DA145xx_SDK\6.0.16.1144\projects\target_apps\peripheral_examples\blinky\Keil_5\out_DA14531\Objects\blinky_531.hex. [INFO RAM@25-03-13 20:18:47] Connection to COM6 port has successfully opened. [INFO RAM@25-03-13 20:18:47] Started download procedure... [ACTION RAM@25-03-13 20:18:48] Please press the hardware reset button on the board to start the download process. [INFO RAM@25-03-13 20:18:51] Reset detected [ERROR RAM@25-03-13 20:18:51] CRC does not match. [ACTION RAM@25-03-13 20:18:51] Please click the Connect/Download button in SmartSnippets Toolbox and press the hardware reset button on the board to start the download process. [INFO Booter@25-03-13 20:18:51] Successfully disconnected from port COM6. [ERROR RAM@25-03-13 20:18:51] Failed downloading Image file to the board. Second attempt to Download firmware to RAM (appeared successful after enabling JTAG from Board menu): [INFO RAM@25-03-13 20:22:03] Found SW-DP with ID 0x0BC11477 [INFO RAM@25-03-13 20:22:03] DPIDR: 0x0BC11477 [INFO RAM@25-03-13 20:22:03] AP map detection skipped. Manually configured AP map found. [INFO RAM@25-03-13 20:22:03] AP[0]: AHB-AP (IDR: Not set) [INFO RAM@25-03-13 20:22:03] AP[0]: Core found [INFO RAM@25-03-13 20:22:03] AP[0]: AHB-AP ROM base: 0xE00FF000 [INFO RAM@25-03-13 20:22:03] CPUID register: 0x410CC601. Implementer code: 0x41 (ARM) [INFO RAM@25-03-13 20:22:03] Found Cortex-M0 r0p1, Little endian. [INFO RAM@25-03-13 20:22:03] FPUnit: 4 code (BP) slots and 0 literal slots [INFO RAM@25-03-13 20:22:03] CoreSight components: [INFO RAM@25-03-13 20:22:03] ROMTbl[0] @ E00FF000 [INFO RAM@25-03-13 20:22:03] ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS [INFO RAM@25-03-13 20:22:03] ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT [INFO RAM@25-03-13 20:22:03] ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB [INFO RAM@25-03-13 20:22:03] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO RAM@25-03-13 20:22:03] Reset: Reset device via AIRCR.SYSRESETREQ. [INFO RAM@25-03-13 20:22:03] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO RAM@25-03-13 20:22:03] Reset: Reset device via AIRCR.SYSRESETREQ. [INFO RAM@25-03-13 20:22:04] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO RAM@25-03-13 20:22:04] Reset: Reset device via AIRCR.SYSRESETREQ. [INFO RAM@25-03-13 20:22:04] Successfully downloaded Image file to the board. Attempted to Flash Code for further debug info: [INFO Flash Code@25-03-13 20:24:06] Found SW-DP with ID 0x0BC11477 [INFO Flash Code@25-03-13 20:24:06] DPIDR: 0x0BC11477 [INFO Flash Code@25-03-13 20:24:06] AP map detection skipped. Manually configured AP map found. [INFO Flash Code@25-03-13 20:24:06] AP[0]: AHB-AP (IDR: Not set) [INFO Flash Code@25-03-13 20:24:06] AP[0]: Core found [INFO Flash Code@25-03-13 20:24:06] AP[0]: AHB-AP ROM base: 0xE00FF000 [INFO Flash Code@25-03-13 20:24:06] CPUID register: 0x410CC601. Implementer code: 0x41 (ARM) [INFO Flash Code@25-03-13 20:24:06] Found Cortex-M0 r0p1, Little endian. [INFO Flash Code@25-03-13 20:24:06] FPUnit: 4 code (BP) slots and 0 literal slots [INFO Flash Code@25-03-13 20:24:06] CoreSight components: [INFO Flash Code@25-03-13 20:24:06] ROMTbl[0] @ E00FF000 [INFO Flash Code@25-03-13 20:24:06] ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS [INFO Flash Code@25-03-13 20:24:06] ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT [INFO Flash Code@25-03-13 20:24:06] ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB [INFO Flash Code@25-03-13 20:24:06] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO Flash Code@25-03-13 20:24:06] Reset: Reset device via AIRCR.SYSRESETREQ. [INFO Flash Code@25-03-13 20:24:06] Reset: SYSRESETREQ has confused core. [INFO Flash Code@25-03-13 20:24:06] Found SW-DP with ID 0x0BC11477 [INFO Flash Code@25-03-13 20:24:06] DPIDR: 0x0BC11477 [INFO Flash Code@25-03-13 20:24:06] AP map detection skipped. Manually configured AP map found. [INFO Flash Code@25-03-13 20:24:06] AP[0]: AHB-AP (IDR: Not set) [INFO Flash Code@25-03-13 20:24:06] AP[0]: Core found [INFO Flash Code@25-03-13 20:24:06] AP[0]: AHB-AP ROM base: 0xE00FF000 [INFO Flash Code@25-03-13 20:24:06] CPUID register: 0x410CC601. Implementer code: 0x41 (ARM) [INFO Flash Code@25-03-13 20:24:06] Found Cortex-M0 r0p1, Little endian. [INFO Flash Code@25-03-13 20:24:06] Reset: Using fallback: Reset pin. [INFO Flash Code@25-03-13 20:24:06] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO Flash Code@25-03-13 20:24:06] Reset: Reset device via reset pin [INFO Flash Code@25-03-13 20:24:06] Firmware File C:\Program Files\SmartSnippetsToolbox\SmartSnippetsToolbox5.0.24\common_resources\SupportPackages\DA1453x\toolbox_resources/common/jtag_programmer_531.bin has been selected for downloading. [INFO Flash Code@25-03-13 20:24:06] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO Flash Code@25-03-13 20:24:06] Reset: Reset device via AIRCR.SYSRESETREQ. [INFO Flash Code@25-03-13 20:24:06] Reset: Halt core after reset via DEMCR.VC_CORERESET. [INFO Flash Code@25-03-13 20:24:06] Reset: Reset device via AIRCR.SYSRESETREQ. [WARNING SPI Flash Programmer@25-03-13 20:24:17] Failed configuring SPI ports and pins. [INFO Flash Code@25-03-13 20:24:17] Successfully downloaded firmware file to the board.
Hi Nate,Thank you for the reply.Did you see the device advertising/scanning as expected when the FW was loaded into SRAM?You could also try to use SEGGER Ozone to debug your project in case Keil IDE is not responding.Please refer here: 5. Debugging using Ozone — DA145XX Tutorial SDK Getting startedBest Regards,OV_Renesas
Unfortunately, no. I have not been able to get any signs of success or feedback from the prototype board. I have a debugging LED (P0_4) which blinks very briefly when the device boots but it doesn't stay lit. I can't seem to get the LED to stay lit or to get any sign of bluetooth functioning. Right now, I've just been using a modified version of the Blinky example where the LED should turn on and stay lit. I also haven't been able to get UART working to get any feedback there. Any suggestions are welcome! Thank you again!
Hi Nate,Thank you for the reply.Could you please share your schematic so we can do a review?If you do not want to share the Schematic on the public forum, please raise a private ticket:Technical Support Services | Support Forums & Ticket Assistance - Renesas | RenesasBest Regards,OV_Renesas
I have attached my schematic here. Thank you!
Schematic_DiscOh-Tag-Prototype-2-26-25_2025-03-17.pdf